
========================================================================

** ELF Header Information

    File Name: .\obj\VKL280_TEST.axf

    Machine class: ELFCLASS32 (32-bit)
    Data encoding: ELFDATA2LSB (Little endian)
    Header version: EV_CURRENT (Current version)
    Operating System ABI: none
    ABI Version: 0
    File Type: ET_EXEC (Executable) (2)
    Machine: EM_ARM (ARM)

    Image Entry point: 0x00001621
    Flags: EF_ARM_HASENTRY (0x05000002)

    ARM ELF revision: 5 (ABI version 2)

    Built with
    Component: ARM Compiler 5.05 update 2 (build 169) Tool: armasm [4d0f2f]
    Component: ARM Compiler 5.05 update 2 (build 169) Tool: armlink [4d0f33]

    Header size: 52 bytes (0x34)
    Program header entry size: 32 bytes (0x20)
    Section header entry size: 40 bytes (0x28)

    Program header entries: 1
    Section header entries: 16

    Program header offset: 341144 (0x00053498)
    Section header offset: 341176 (0x000534b8)

    Section header string table index: 15

========================================================================

** Program header #0 (PT_LOAD) [PF_X + PF_W + PF_R + PF_ARM_ENTRY]
    Size : 8852 bytes (5996 bytes in file)
    Virtual address: 0x00000000 (Alignment 8)


========================================================================

** Section #1 'ER_RO' (SHT_PROGBITS) [SHF_ALLOC + SHF_EXECINSTR]
    Size   : 5940 bytes (alignment 4)
    Address: 0x00000000

    $d.realdata
    RESET
    __Vectors
        0x00000000:    20000b60    `..     DCD    536873824
        0x00000004:    00001621    !...    DCD    5665
        0x00000008:    00001653    S...    DCD    5715
        0x0000000c:    00001655    U...    DCD    5717
        0x00000010:    00001657    W...    DCD    5719
        0x00000014:    00001659    Y...    DCD    5721
        0x00000018:    0000165b    [...    DCD    5723
        0x0000001c:    00000000    ....    DCD    0
        0x00000020:    00000000    ....    DCD    0
        0x00000024:    00000000    ....    DCD    0
        0x00000028:    00000000    ....    DCD    0
        0x0000002c:    0000165d    ]...    DCD    5725
        0x00000030:    0000165f    _...    DCD    5727
        0x00000034:    00000000    ....    DCD    0
        0x00000038:    00001661    a...    DCD    5729
        0x0000003c:    00001663    c...    DCD    5731
        0x00000040:    00001665    e...    DCD    5733
        0x00000044:    00001665    e...    DCD    5733
        0x00000048:    00001665    e...    DCD    5733
        0x0000004c:    00001665    e...    DCD    5733
        0x00000050:    00001665    e...    DCD    5733
        0x00000054:    00001665    e...    DCD    5733
        0x00000058:    00001665    e...    DCD    5733
        0x0000005c:    00001665    e...    DCD    5733
        0x00000060:    00001665    e...    DCD    5733
        0x00000064:    00001665    e...    DCD    5733
        0x00000068:    00001665    e...    DCD    5733
        0x0000006c:    00001665    e...    DCD    5733
        0x00000070:    00001665    e...    DCD    5733
        0x00000074:    00001665    e...    DCD    5733
        0x00000078:    00001665    e...    DCD    5733
        0x0000007c:    00001665    e...    DCD    5733
        0x00000080:    00001665    e...    DCD    5733
        0x00000084:    00001665    e...    DCD    5733
        0x00000088:    00001665    e...    DCD    5733
        0x0000008c:    00001665    e...    DCD    5733
        0x00000090:    00001665    e...    DCD    5733
        0x00000094:    00001665    e...    DCD    5733
        0x00000098:    00001665    e...    DCD    5733
        0x0000009c:    00001665    e...    DCD    5733
        0x000000a0:    00001665    e...    DCD    5733
        0x000000a4:    00001665    e...    DCD    5733
        0x000000a8:    00001665    e...    DCD    5733
        0x000000ac:    00001665    e...    DCD    5733
        0x000000b0:    00001665    e...    DCD    5733
        0x000000b4:    00001665    e...    DCD    5733
        0x000000b8:    00001665    e...    DCD    5733
        0x000000bc:    00001665    e...    DCD    5733
        0x000000c0:    00001665    e...    DCD    5733
        0x000000c4:    00001665    e...    DCD    5733
        0x000000c8:    00001665    e...    DCD    5733
        0x000000cc:    00001665    e...    DCD    5733
        0x000000d0:    00001665    e...    DCD    5733
        0x000000d4:    00001665    e...    DCD    5733
        0x000000d8:    000001e1    ....    DCD    481
        0x000000dc:    00001665    e...    DCD    5733
        0x000000e0:    00001665    e...    DCD    5733
        0x000000e4:    00001665    e...    DCD    5733
        0x000000e8:    00001665    e...    DCD    5733
        0x000000ec:    00001665    e...    DCD    5733
        0x000000f0:    00001665    e...    DCD    5733
        0x000000f4:    00001665    e...    DCD    5733
        0x000000f8:    00001665    e...    DCD    5733
        0x000000fc:    00001665    e...    DCD    5733
        0x00000100:    00001665    e...    DCD    5733
        0x00000104:    00001665    e...    DCD    5733
        0x00000108:    00001665    e...    DCD    5733
        0x0000010c:    00001665    e...    DCD    5733
        0x00000110:    00001665    e...    DCD    5733
        0x00000114:    00001665    e...    DCD    5733
        0x00000118:    00001665    e...    DCD    5733
        0x0000011c:    00001665    e...    DCD    5733
        0x00000120:    00001665    e...    DCD    5733
        0x00000124:    00001665    e...    DCD    5733
        0x00000128:    00001665    e...    DCD    5733
        0x0000012c:    00001665    e...    DCD    5733
        0x00000130:    00001665    e...    DCD    5733
        0x00000134:    00001665    e...    DCD    5733
        0x00000138:    00001665    e...    DCD    5733
        0x0000013c:    00001665    e...    DCD    5733
    $t
    !!!main
    __Vectors_End
    __main
        0x00000140:    f000f802    ....    BL       __scatterload ; 0x148
        0x00000144:    f000f83c    ..<.    BL       __rt_entry ; 0x1c0
    !!!scatter
    __scatterload
    __scatterload_rt2
    __scatterload_rt2_thumb_only
        0x00000148:    a00a        ..      ADR      r0,{pc}+0x2c ; 0x174
        0x0000014a:    e8900c00    ....    LDM      r0,{r10,r11}
        0x0000014e:    4482        .D      ADD      r10,r10,r0
        0x00000150:    4483        .D      ADD      r11,r11,r0
        0x00000152:    f1aa0701    ....    SUB      r7,r10,#1
    __scatterload_null
        0x00000156:    45da        .E      CMP      r10,r11
        0x00000158:    d101        ..      BNE      0x15e ; __scatterload_null + 8
        0x0000015a:    f000f831    ..1.    BL       __rt_entry ; 0x1c0
        0x0000015e:    f2af0e09    ....    ADR      lr,{pc}-7 ; 0x157
        0x00000162:    e8ba000f    ....    LDM      r10!,{r0-r3}
        0x00000166:    f0130f01    ....    TST      r3,#1
        0x0000016a:    bf18        ..      IT       NE
        0x0000016c:    1afb        ..      SUBNE    r3,r7,r3
        0x0000016e:    f0430301    C...    ORR      r3,r3,#1
        0x00000172:    4718        .G      BX       r3
    $d
        0x00000174:    000015a0    ....    DCD    5536
        0x00000178:    000015c0    ....    DCD    5568
    $t
    !!handler_copy
    __scatterload_copy
        0x0000017c:    3a10        .:      SUBS     r2,r2,#0x10
        0x0000017e:    bf24        $.      ITT      CS
        0x00000180:    c878        x.      LDMCS    r0!,{r3-r6}
        0x00000182:    c178        x.      STMCS    r1!,{r3-r6}
        0x00000184:    d8fa        ..      BHI      __scatterload_copy ; 0x17c
        0x00000186:    0752        R.      LSLS     r2,r2,#29
        0x00000188:    bf24        $.      ITT      CS
        0x0000018a:    c830        0.      LDMCS    r0!,{r4,r5}
        0x0000018c:    c130        0.      STMCS    r1!,{r4,r5}
        0x0000018e:    bf44        D.      ITT      MI
        0x00000190:    6804        .h      LDRMI    r4,[r0,#0]
        0x00000192:    600c        .`      STRMI    r4,[r1,#0]
        0x00000194:    4770        pG      BX       lr
        0x00000196:    0000        ..      MOVS     r0,r0
    !!handler_zi
    __scatterload_zeroinit
        0x00000198:    2300        .#      MOVS     r3,#0
        0x0000019a:    2400        .$      MOVS     r4,#0
        0x0000019c:    2500        .%      MOVS     r5,#0
        0x0000019e:    2600        .&      MOVS     r6,#0
        0x000001a0:    3a10        .:      SUBS     r2,r2,#0x10
        0x000001a2:    bf28        (.      IT       CS
        0x000001a4:    c178        x.      STMCS    r1!,{r3-r6}
        0x000001a6:    d8fb        ..      BHI      0x1a0 ; __scatterload_zeroinit + 8
        0x000001a8:    0752        R.      LSLS     r2,r2,#29
        0x000001aa:    bf28        (.      IT       CS
        0x000001ac:    c130        0.      STMCS    r1!,{r4,r5}
        0x000001ae:    bf48        H.      IT       MI
        0x000001b0:    600b        .`      STRMI    r3,[r1,#0]
        0x000001b2:    4770        pG      BX       lr
    .ARM.Collect$$libinit$$00000000
    __rt_lib_init
        0x000001b4:    b51f        ..      PUSH     {r0-r4,lr}
    .ARM.Collect$$libinit$$00000001
    __rt_lib_init_fp_1
        0x000001b6:    f001faa8    ....    BL       __semihosting_library_function ; 0x170a
    .ARM.Collect$$libinit$$00000004
    .ARM.Collect$$libinit$$0000000A
    .ARM.Collect$$libinit$$0000000C
    .ARM.Collect$$libinit$$0000000E
    .ARM.Collect$$libinit$$00000011
    .ARM.Collect$$libinit$$00000013
    .ARM.Collect$$libinit$$00000015
    .ARM.Collect$$libinit$$00000017
    .ARM.Collect$$libinit$$00000019
    .ARM.Collect$$libinit$$0000001B
    .ARM.Collect$$libinit$$0000001D
    .ARM.Collect$$libinit$$0000001F
    .ARM.Collect$$libinit$$00000021
    .ARM.Collect$$libinit$$00000023
    .ARM.Collect$$libinit$$00000025
    .ARM.Collect$$libinit$$0000002C
    .ARM.Collect$$libinit$$0000002E
    .ARM.Collect$$libinit$$00000030
    .ARM.Collect$$libinit$$00000032
    .ARM.Collect$$libinit$$00000033
    __rt_lib_init_alloca_1
    __rt_lib_init_argv_1
    __rt_lib_init_atexit_1
    __rt_lib_init_clock_1
    __rt_lib_init_cpp_1
    __rt_lib_init_exceptions_1
    __rt_lib_init_fp_trap_1
    __rt_lib_init_getenv_1
    __rt_lib_init_heap_1
    __rt_lib_init_lc_collate_1
    __rt_lib_init_lc_ctype_1
    __rt_lib_init_lc_monetary_1
    __rt_lib_init_lc_numeric_1
    __rt_lib_init_lc_time_1
    __rt_lib_init_preinit_1
    __rt_lib_init_rand_1
    __rt_lib_init_return
    __rt_lib_init_signal_1
    __rt_lib_init_stdio_1
    __rt_lib_init_user_alloc_1
        0x000001ba:    bd1f        ..      POP      {r0-r4,pc}
    .ARM.Collect$$libshutdown$$00000000
    __rt_lib_shutdown
        0x000001bc:    b510        ..      PUSH     {r4,lr}
    .ARM.Collect$$libshutdown$$00000003
    .ARM.Collect$$libshutdown$$00000006
    .ARM.Collect$$libshutdown$$00000009
    .ARM.Collect$$libshutdown$$0000000B
    .ARM.Collect$$libshutdown$$0000000E
    .ARM.Collect$$libshutdown$$0000000F
    __rt_lib_shutdown_fp_trap_1
    __rt_lib_shutdown_heap_1
    __rt_lib_shutdown_return
    __rt_lib_shutdown_signal_1
    __rt_lib_shutdown_stdio_1
    __rt_lib_shutdown_user_alloc_1
        0x000001be:    bd10        ..      POP      {r4,pc}
    .ARM.Collect$$rtentry$$00000000
    .ARM.Collect$$rtentry$$00000002
    .ARM.Collect$$rtentry$$00000004
    __rt_entry
    __rt_entry_presh_1
    __rt_entry_sh
        0x000001c0:    f001fa6d    ..m.    BL       __user_setup_stackheap ; 0x169e
        0x000001c4:    4611        .F      MOV      r1,r2
    .ARM.Collect$$rtentry$$00000009
    .ARM.Collect$$rtentry$$0000000A
    __rt_entry_li
    __rt_entry_postsh_1
        0x000001c6:    f7fffff5    ....    BL       __rt_lib_init ; 0x1b4
    .ARM.Collect$$rtentry$$0000000C
    .ARM.Collect$$rtentry$$0000000D
    __rt_entry_main
    __rt_entry_postli_1
        0x000001ca:    f000f94a    ..J.    BL       main ; 0x462
        0x000001ce:    f001fa8b    ....    BL       exit ; 0x16e8
    .ARM.Collect$$rtexit$$00000000
    __rt_exit
        0x000001d2:    b403        ..      PUSH     {r0,r1}
    .ARM.Collect$$rtexit$$00000002
    .ARM.Collect$$rtexit$$00000003
    __rt_exit_ls
    __rt_exit_prels_1
        0x000001d4:    f7fffff2    ....    BL       __rt_lib_shutdown ; 0x1bc
    .ARM.Collect$$rtexit$$00000004
    __rt_exit_exit
        0x000001d8:    bc03        ..      POP      {r0,r1}
        0x000001da:    f001fa8f    ....    BL       _sys_exit ; 0x16fc
        0x000001de:    0000        ..      MOVS     r0,r0
    .text
    I2C0_IRQHandler
        0x000001e0:    b510        ..      PUSH     {r4,lr}
        0x000001e2:    48bf        .H      LDR      r0,[pc,#764] ; [0x4e0] = 0x40080000
        0x000001e4:    68c4        .h      LDR      r4,[r0,#0xc]
        0x000001e6:    6940        @i      LDR      r0,[r0,#0x14]
        0x000001e8:    f0000001    ....    AND      r0,r0,#1
        0x000001ec:    b118        ..      CBZ      r0,0x1f6 ; I2C0_IRQHandler + 22
        0x000001ee:    48bc        .H      LDR      r0,[pc,#752] ; [0x4e0] = 0x40080000
        0x000001f0:    f001f832    ..2.    BL       I2C_ClearTimeoutFlag ; 0x1258
        0x000001f4:    e006        ..      B        0x204 ; I2C0_IRQHandler + 36
        0x000001f6:    48bb        .H      LDR      r0,[pc,#748] ; [0x4e4] = 0x20000000
        0x000001f8:    6800        .h      LDR      r0,[r0,#0]
        0x000001fa:    b118        ..      CBZ      r0,0x204 ; I2C0_IRQHandler + 36
        0x000001fc:    4620         F      MOV      r0,r4
        0x000001fe:    49b9        .I      LDR      r1,[pc,#740] ; [0x4e4] = 0x20000000
        0x00000200:    6809        .h      LDR      r1,[r1,#0]
        0x00000202:    4788        .G      BLX      r1
        0x00000204:    bd10        ..      POP      {r4,pc}
    I2C_MasterRx
        0x00000206:    b510        ..      PUSH     {r4,lr}
        0x00000208:    4604        .F      MOV      r4,r0
        0x0000020a:    2c08        .,      CMP      r4,#8
        0x0000020c:    d10a        ..      BNE      0x224 ; I2C_MasterRx + 30
        0x0000020e:    207c        |       MOVS     r0,#0x7c
        0x00000210:    49b3        .I      LDR      r1,[pc,#716] ; [0x4e0] = 0x40080000
        0x00000212:    6088        .`      STR      r0,[r1,#8]
        0x00000214:    4608        .F      MOV      r0,r1
        0x00000216:    6800        .h      LDR      r0,[r0,#0]
        0x00000218:    f020003c     .<.    BIC      r0,r0,#0x3c
        0x0000021c:    f0400008    @...    ORR      r0,r0,#8
        0x00000220:    6008        .`      STR      r0,[r1,#0]
        0x00000222:    e055        U.      B        0x2d0 ; I2C_MasterRx + 202
        0x00000224:    2c18        .,      CMP      r4,#0x18
        0x00000226:    d111        ..      BNE      0x24c ; I2C_MasterRx + 70
        0x00000228:    48af        .H      LDR      r0,[pc,#700] ; [0x4e8] = 0x20000006
        0x0000022a:    7801        .x      LDRB     r1,[r0,#0]
        0x0000022c:    7800        .x      LDRB     r0,[r0,#0]
        0x0000022e:    1c40        @.      ADDS     r0,r0,#1
        0x00000230:    4aad        .J      LDR      r2,[pc,#692] ; [0x4e8] = 0x20000006
        0x00000232:    7010        .p      STRB     r0,[r2,#0]
        0x00000234:    48ad        .H      LDR      r0,[pc,#692] ; [0x4ec] = 0x20000078
        0x00000236:    5c40        @\      LDRB     r0,[r0,r1]
        0x00000238:    49a9        .I      LDR      r1,[pc,#676] ; [0x4e0] = 0x40080000
        0x0000023a:    6088        .`      STR      r0,[r1,#8]
        0x0000023c:    4608        .F      MOV      r0,r1
        0x0000023e:    6800        .h      LDR      r0,[r0,#0]
        0x00000240:    f020003c     .<.    BIC      r0,r0,#0x3c
        0x00000244:    f0400008    @...    ORR      r0,r0,#8
        0x00000248:    6008        .`      STR      r0,[r1,#0]
        0x0000024a:    e041        A.      B        0x2d0 ; I2C_MasterRx + 202
        0x0000024c:    2c20         ,      CMP      r4,#0x20
        0x0000024e:    d10b        ..      BNE      0x268 ; I2C_MasterRx + 98
        0x00000250:    48a3        .H      LDR      r0,[pc,#652] ; [0x4e0] = 0x40080000
        0x00000252:    f000f93a    ..:.    BL       I2C_STOP ; 0x4ca
        0x00000256:    48a2        .H      LDR      r0,[pc,#648] ; [0x4e0] = 0x40080000
        0x00000258:    6800        .h      LDR      r0,[r0,#0]
        0x0000025a:    f0200008     ...    BIC      r0,r0,#8
        0x0000025e:    f0400020    @. .    ORR      r0,r0,#0x20
        0x00000262:    499f        .I      LDR      r1,[pc,#636] ; [0x4e0] = 0x40080000
        0x00000264:    6008        .`      STR      r0,[r1,#0]
        0x00000266:    e033        3.      B        0x2d0 ; I2C_MasterRx + 202
        0x00000268:    2c28        (,      CMP      r4,#0x28
        0x0000026a:    d108        ..      BNE      0x27e ; I2C_MasterRx + 120
        0x0000026c:    489c        .H      LDR      r0,[pc,#624] ; [0x4e0] = 0x40080000
        0x0000026e:    6800        .h      LDR      r0,[r0,#0]
        0x00000270:    f020003c     .<.    BIC      r0,r0,#0x3c
        0x00000274:    f0400028    @.(.    ORR      r0,r0,#0x28
        0x00000278:    4999        .I      LDR      r1,[pc,#612] ; [0x4e0] = 0x40080000
        0x0000027a:    6008        .`      STR      r0,[r1,#0]
        0x0000027c:    e028        (.      B        0x2d0 ; I2C_MasterRx + 202
        0x0000027e:    2c10        .,      CMP      r4,#0x10
        0x00000280:    d10a        ..      BNE      0x298 ; I2C_MasterRx + 146
        0x00000282:    207d        }       MOVS     r0,#0x7d
        0x00000284:    4996        .I      LDR      r1,[pc,#600] ; [0x4e0] = 0x40080000
        0x00000286:    6088        .`      STR      r0,[r1,#8]
        0x00000288:    4608        .F      MOV      r0,r1
        0x0000028a:    6800        .h      LDR      r0,[r0,#0]
        0x0000028c:    f020003c     .<.    BIC      r0,r0,#0x3c
        0x00000290:    f0400008    @...    ORR      r0,r0,#8
        0x00000294:    6008        .`      STR      r0,[r1,#0]
        0x00000296:    e01b        ..      B        0x2d0 ; I2C_MasterRx + 202
        0x00000298:    2c40        @,      CMP      r4,#0x40
        0x0000029a:    d108        ..      BNE      0x2ae ; I2C_MasterRx + 168
        0x0000029c:    4890        .H      LDR      r0,[pc,#576] ; [0x4e0] = 0x40080000
        0x0000029e:    6800        .h      LDR      r0,[r0,#0]
        0x000002a0:    f020003c     .<.    BIC      r0,r0,#0x3c
        0x000002a4:    f0400008    @...    ORR      r0,r0,#8
        0x000002a8:    498d        .I      LDR      r1,[pc,#564] ; [0x4e0] = 0x40080000
        0x000002aa:    6008        .`      STR      r0,[r1,#0]
        0x000002ac:    e010        ..      B        0x2d0 ; I2C_MasterRx + 202
        0x000002ae:    2c58        X,      CMP      r4,#0x58
        0x000002b0:    d10e        ..      BNE      0x2d0 ; I2C_MasterRx + 202
        0x000002b2:    488b        .H      LDR      r0,[pc,#556] ; [0x4e0] = 0x40080000
        0x000002b4:    6880        .h      LDR      r0,[r0,#8]
        0x000002b6:    498e        .I      LDR      r1,[pc,#568] ; [0x4f0] = 0x20000004
        0x000002b8:    7008        .p      STRB     r0,[r1,#0]
        0x000002ba:    4889        .H      LDR      r0,[pc,#548] ; [0x4e0] = 0x40080000
        0x000002bc:    6800        .h      LDR      r0,[r0,#0]
        0x000002be:    f020003c     .<.    BIC      r0,r0,#0x3c
        0x000002c2:    f0400018    @...    ORR      r0,r0,#0x18
        0x000002c6:    4986        .I      LDR      r1,[pc,#536] ; [0x4e0] = 0x40080000
        0x000002c8:    6008        .`      STR      r0,[r1,#0]
        0x000002ca:    2001        .       MOVS     r0,#1
        0x000002cc:    4989        .I      LDR      r1,[pc,#548] ; [0x4f4] = 0x20000009
        0x000002ce:    7008        .p      STRB     r0,[r1,#0]
        0x000002d0:    bd10        ..      POP      {r4,pc}
    I2C_MasterTx
        0x000002d2:    b510        ..      PUSH     {r4,lr}
        0x000002d4:    4604        .F      MOV      r4,r0
        0x000002d6:    2c08        .,      CMP      r4,#8
        0x000002d8:    d10a        ..      BNE      0x2f0 ; I2C_MasterTx + 30
        0x000002da:    207c        |       MOVS     r0,#0x7c
        0x000002dc:    4980        .I      LDR      r1,[pc,#512] ; [0x4e0] = 0x40080000
        0x000002de:    6088        .`      STR      r0,[r1,#8]
        0x000002e0:    4608        .F      MOV      r0,r1
        0x000002e2:    6800        .h      LDR      r0,[r0,#0]
        0x000002e4:    f020003c     .<.    BIC      r0,r0,#0x3c
        0x000002e8:    f0400008    @...    ORR      r0,r0,#8
        0x000002ec:    6008        .`      STR      r0,[r1,#0]
        0x000002ee:    e046        F.      B        0x37e ; I2C_MasterTx + 172
        0x000002f0:    2c18        .,      CMP      r4,#0x18
        0x000002f2:    d111        ..      BNE      0x318 ; I2C_MasterTx + 70
        0x000002f4:    487c        |H      LDR      r0,[pc,#496] ; [0x4e8] = 0x20000006
        0x000002f6:    7801        .x      LDRB     r1,[r0,#0]
        0x000002f8:    7800        .x      LDRB     r0,[r0,#0]
        0x000002fa:    1c40        @.      ADDS     r0,r0,#1
        0x000002fc:    4a7a        zJ      LDR      r2,[pc,#488] ; [0x4e8] = 0x20000006
        0x000002fe:    7010        .p      STRB     r0,[r2,#0]
        0x00000300:    487d        }H      LDR      r0,[pc,#500] ; [0x4f8] = 0x20000038
        0x00000302:    5c40        @\      LDRB     r0,[r0,r1]
        0x00000304:    4976        vI      LDR      r1,[pc,#472] ; [0x4e0] = 0x40080000
        0x00000306:    6088        .`      STR      r0,[r1,#8]
        0x00000308:    4608        .F      MOV      r0,r1
        0x0000030a:    6800        .h      LDR      r0,[r0,#0]
        0x0000030c:    f020003c     .<.    BIC      r0,r0,#0x3c
        0x00000310:    f0400008    @...    ORR      r0,r0,#8
        0x00000314:    6008        .`      STR      r0,[r1,#0]
        0x00000316:    e032        2.      B        0x37e ; I2C_MasterTx + 172
        0x00000318:    2c20         ,      CMP      r4,#0x20
        0x0000031a:    d10b        ..      BNE      0x334 ; I2C_MasterTx + 98
        0x0000031c:    4870        pH      LDR      r0,[pc,#448] ; [0x4e0] = 0x40080000
        0x0000031e:    f000f8d4    ....    BL       I2C_STOP ; 0x4ca
        0x00000322:    486f        oH      LDR      r0,[pc,#444] ; [0x4e0] = 0x40080000
        0x00000324:    6800        .h      LDR      r0,[r0,#0]
        0x00000326:    f0200008     ...    BIC      r0,r0,#8
        0x0000032a:    f0400020    @. .    ORR      r0,r0,#0x20
        0x0000032e:    496c        lI      LDR      r1,[pc,#432] ; [0x4e0] = 0x40080000
        0x00000330:    6008        .`      STR      r0,[r1,#0]
        0x00000332:    e024        $.      B        0x37e ; I2C_MasterTx + 172
        0x00000334:    2c28        (,      CMP      r4,#0x28
        0x00000336:    d122        ".      BNE      0x37e ; I2C_MasterTx + 172
        0x00000338:    486b        kH      LDR      r0,[pc,#428] ; [0x4e8] = 0x20000006
        0x0000033a:    7800        .x      LDRB     r0,[r0,#0]
        0x0000033c:    496f        oI      LDR      r1,[pc,#444] ; [0x4fc] = 0x20000005
        0x0000033e:    7809        .x      LDRB     r1,[r1,#0]
        0x00000340:    4288        .B      CMP      r0,r1
        0x00000342:    d011        ..      BEQ      0x368 ; I2C_MasterTx + 150
        0x00000344:    4868        hH      LDR      r0,[pc,#416] ; [0x4e8] = 0x20000006
        0x00000346:    7801        .x      LDRB     r1,[r0,#0]
        0x00000348:    7800        .x      LDRB     r0,[r0,#0]
        0x0000034a:    1c40        @.      ADDS     r0,r0,#1
        0x0000034c:    4a66        fJ      LDR      r2,[pc,#408] ; [0x4e8] = 0x20000006
        0x0000034e:    7010        .p      STRB     r0,[r2,#0]
        0x00000350:    4869        iH      LDR      r0,[pc,#420] ; [0x4f8] = 0x20000038
        0x00000352:    5c40        @\      LDRB     r0,[r0,r1]
        0x00000354:    4962        bI      LDR      r1,[pc,#392] ; [0x4e0] = 0x40080000
        0x00000356:    6088        .`      STR      r0,[r1,#8]
        0x00000358:    4608        .F      MOV      r0,r1
        0x0000035a:    6800        .h      LDR      r0,[r0,#0]
        0x0000035c:    f020003c     .<.    BIC      r0,r0,#0x3c
        0x00000360:    f0400008    @...    ORR      r0,r0,#8
        0x00000364:    6008        .`      STR      r0,[r1,#0]
        0x00000366:    e00a        ..      B        0x37e ; I2C_MasterTx + 172
        0x00000368:    485d        ]H      LDR      r0,[pc,#372] ; [0x4e0] = 0x40080000
        0x0000036a:    6800        .h      LDR      r0,[r0,#0]
        0x0000036c:    f020003c     .<.    BIC      r0,r0,#0x3c
        0x00000370:    f0400018    @...    ORR      r0,r0,#0x18
        0x00000374:    495a        ZI      LDR      r1,[pc,#360] ; [0x4e0] = 0x40080000
        0x00000376:    6008        .`      STR      r0,[r1,#0]
        0x00000378:    2001        .       MOVS     r0,#1
        0x0000037a:    495e        ^I      LDR      r1,[pc,#376] ; [0x4f4] = 0x20000009
        0x0000037c:    7008        .p      STRB     r0,[r1,#0]
        0x0000037e:    bd10        ..      POP      {r4,pc}
    loopshift_left8
        0x00000380:    b510        ..      PUSH     {r4,lr}
        0x00000382:    4601        .F      MOV      r1,r0
        0x00000384:    460a        .F      MOV      r2,r1
        0x00000386:    2000        .       MOVS     r0,#0
        0x00000388:    2300        .#      MOVS     r3,#0
        0x0000038a:    e00a        ..      B        0x3a2 ; loopshift_left8 + 34
        0x0000038c:    1040        @.      ASRS     r0,r0,#1
        0x0000038e:    f0020480    ....    AND      r4,r2,#0x80
        0x00000392:    2c80        .,      CMP      r4,#0x80
        0x00000394:    d101        ..      BNE      0x39a ; loopshift_left8 + 26
        0x00000396:    f0400080    @...    ORR      r0,r0,#0x80
        0x0000039a:    0654        T.      LSLS     r4,r2,#25
        0x0000039c:    0e22        ".      LSRS     r2,r4,#24
        0x0000039e:    1c5c        \.      ADDS     r4,r3,#1
        0x000003a0:    b2e3        ..      UXTB     r3,r4
        0x000003a2:    2b08        .+      CMP      r3,#8
        0x000003a4:    dbf2        ..      BLT      0x38c ; loopshift_left8 + 12
        0x000003a6:    bd10        ..      POP      {r4,pc}
    VKL280_I2C_WRDat
        0x000003a8:    b570        p.      PUSH     {r4-r6,lr}
        0x000003aa:    4603        .F      MOV      r3,r0
        0x000003ac:    4d52        RM      LDR      r5,[pc,#328] ; [0x4f8] = 0x20000038
        0x000003ae:    702b        +p      STRB     r3,[r5,#0]
        0x000003b0:    2000        .       MOVS     r0,#0
        0x000003b2:    e005        ..      B        0x3c0 ; VKL280_I2C_WRDat + 24
        0x000003b4:    f8115b01    ...[    LDRB     r5,[r1],#1
        0x000003b8:    1c44        D.      ADDS     r4,r0,#1
        0x000003ba:    4e4f        ON      LDR      r6,[pc,#316] ; [0x4f8] = 0x20000038
        0x000003bc:    5535        5U      STRB     r5,[r6,r4]
        0x000003be:    b2e0        ..      UXTB     r0,r4
        0x000003c0:    4290        .B      CMP      r0,r2
        0x000003c2:    dbf7        ..      BLT      0x3b4 ; VKL280_I2C_WRDat + 12
        0x000003c4:    2400        .$      MOVS     r4,#0
        0x000003c6:    4d48        HM      LDR      r5,[pc,#288] ; [0x4e8] = 0x20000006
        0x000003c8:    702c        ,p      STRB     r4,[r5,#0]
        0x000003ca:    1c54        T.      ADDS     r4,r2,#1
        0x000003cc:    4d4b        KM      LDR      r5,[pc,#300] ; [0x4fc] = 0x20000005
        0x000003ce:    702c        ,p      STRB     r4,[r5,#0]
        0x000003d0:    2400        .$      MOVS     r4,#0
        0x000003d2:    4d48        HM      LDR      r5,[pc,#288] ; [0x4f4] = 0x20000009
        0x000003d4:    702c        ,p      STRB     r4,[r5,#0]
        0x000003d6:    f2af1405    ....    ADR      r4,{pc}-0x103 ; 0x2d3
        0x000003da:    4d42        BM      LDR      r5,[pc,#264] ; [0x4e4] = 0x20000000
        0x000003dc:    602c        ,`      STR      r4,[r5,#0]
        0x000003de:    4c40        @L      LDR      r4,[pc,#256] ; [0x4e0] = 0x40080000
        0x000003e0:    6824        $h      LDR      r4,[r4,#0]
        0x000003e2:    f024043c    $.<.    BIC      r4,r4,#0x3c
        0x000003e6:    f0440420    D. .    ORR      r4,r4,#0x20
        0x000003ea:    4d3d        =M      LDR      r5,[pc,#244] ; [0x4e0] = 0x40080000
        0x000003ec:    602c        ,`      STR      r4,[r5,#0]
        0x000003ee:    bf00        ..      NOP      
        0x000003f0:    4c40        @L      LDR      r4,[pc,#256] ; [0x4f4] = 0x20000009
        0x000003f2:    7824        $x      LDRB     r4,[r4,#0]
        0x000003f4:    2c00        .,      CMP      r4,#0
        0x000003f6:    d0fb        ..      BEQ      0x3f0 ; VKL280_I2C_WRDat + 72
        0x000003f8:    2400        .$      MOVS     r4,#0
        0x000003fa:    4d3e        >M      LDR      r5,[pc,#248] ; [0x4f4] = 0x20000009
        0x000003fc:    702c        ,p      STRB     r4,[r5,#0]
        0x000003fe:    bd70        p.      POP      {r4-r6,pc}
    VKL280_I2C_RDDat
        0x00000400:    b570        p.      PUSH     {r4-r6,lr}
        0x00000402:    4603        .F      MOV      r3,r0
        0x00000404:    4614        .F      MOV      r4,r2
        0x00000406:    2000        .       MOVS     r0,#0
        0x00000408:    e028        (.      B        0x45c ; VKL280_I2C_RDDat + 92
        0x0000040a:    181d        ..      ADDS     r5,r3,r0
        0x0000040c:    4e37        7N      LDR      r6,[pc,#220] ; [0x4ec] = 0x20000078
        0x0000040e:    7035        5p      STRB     r5,[r6,#0]
        0x00000410:    2500        .%      MOVS     r5,#0
        0x00000412:    4e35        5N      LDR      r6,[pc,#212] ; [0x4e8] = 0x20000006
        0x00000414:    7035        5p      STRB     r5,[r6,#0]
        0x00000416:    2501        .%      MOVS     r5,#1
        0x00000418:    4e38        8N      LDR      r6,[pc,#224] ; [0x4fc] = 0x20000005
        0x0000041a:    7035        5p      STRB     r5,[r6,#0]
        0x0000041c:    2500        .%      MOVS     r5,#0
        0x0000041e:    4e35        5N      LDR      r6,[pc,#212] ; [0x4f4] = 0x20000009
        0x00000420:    7035        5p      STRB     r5,[r6,#0]
        0x00000422:    f2af251d    ...%    ADR      r5,{pc}-0x21b ; 0x207
        0x00000426:    4e2f        /N      LDR      r6,[pc,#188] ; [0x4e4] = 0x20000000
        0x00000428:    6035        5`      STR      r5,[r6,#0]
        0x0000042a:    2500        .%      MOVS     r5,#0
        0x0000042c:    4e34        4N      LDR      r6,[pc,#208] ; [0x500] = 0x20000008
        0x0000042e:    7035        5p      STRB     r5,[r6,#0]
        0x00000430:    2501        .%      MOVS     r5,#1
        0x00000432:    4e34        4N      LDR      r6,[pc,#208] ; [0x504] = 0x20000007
        0x00000434:    7035        5p      STRB     r5,[r6,#0]
        0x00000436:    4d2a        *M      LDR      r5,[pc,#168] ; [0x4e0] = 0x40080000
        0x00000438:    682d        -h      LDR      r5,[r5,#0]
        0x0000043a:    f025053c    %.<.    BIC      r5,r5,#0x3c
        0x0000043e:    f0450520    E. .    ORR      r5,r5,#0x20
        0x00000442:    4e27        'N      LDR      r6,[pc,#156] ; [0x4e0] = 0x40080000
        0x00000444:    6035        5`      STR      r5,[r6,#0]
        0x00000446:    bf00        ..      NOP      
        0x00000448:    4d2a        *M      LDR      r5,[pc,#168] ; [0x4f4] = 0x20000009
        0x0000044a:    782d        -x      LDRB     r5,[r5,#0]
        0x0000044c:    2d00        .-      CMP      r5,#0
        0x0000044e:    d0fb        ..      BEQ      0x448 ; VKL280_I2C_RDDat + 72
        0x00000450:    4d27        'M      LDR      r5,[pc,#156] ; [0x4f0] = 0x20000004
        0x00000452:    782d        -x      LDRB     r5,[r5,#0]
        0x00000454:    f8015b01    ...[    STRB     r5,[r1],#1
        0x00000458:    1c45        E.      ADDS     r5,r0,#1
        0x0000045a:    b2e8        ..      UXTB     r0,r5
        0x0000045c:    42a0        .B      CMP      r0,r4
        0x0000045e:    dbd4        ..      BLT      0x40a ; VKL280_I2C_RDDat + 10
        0x00000460:    bd70        p.      POP      {r4-r6,pc}
    main
        0x00000462:    b510        ..      PUSH     {r4,lr}
        0x00000464:    bf00        ..      NOP      
        0x00000466:    bf00        ..      NOP      
        0x00000468:    bf00        ..      NOP      
        0x0000046a:    2059        Y       MOVS     r0,#0x59
        0x0000046c:    4926        &I      LDR      r1,[pc,#152] ; [0x508] = 0x40000100
        0x0000046e:    6008        .`      STR      r0,[r1,#0]
        0x00000470:    2016        .       MOVS     r0,#0x16
        0x00000472:    0589        ..      LSLS     r1,r1,#22
        0x00000474:    f8c10100    ....    STR      r0,[r1,#0x100]
        0x00000478:    2088        .       MOVS     r0,#0x88
        0x0000047a:    f8c10100    ....    STR      r0,[r1,#0x100]
        0x0000047e:    06c0        ..      LSLS     r0,r0,#27
        0x00000480:    f8d00100    ....    LDR      r0,[r0,#0x100]
        0x00000484:    2800        .(      CMP      r0,#0
        0x00000486:    d0f0        ..      BEQ      0x46a ; main + 8
        0x00000488:    bf00        ..      NOP      
        0x0000048a:    f000fb05    ....    BL       SYS_Init ; 0xa98
        0x0000048e:    bf00        ..      NOP      
        0x00000490:    2000        .       MOVS     r0,#0
        0x00000492:    491d        .I      LDR      r1,[pc,#116] ; [0x508] = 0x40000100
        0x00000494:    6008        .`      STR      r0,[r1,#0]
        0x00000496:    bf00        ..      NOP      
        0x00000498:    2300        .#      MOVS     r3,#0
        0x0000049a:    223e        >"      MOVS     r2,#0x3e
        0x0000049c:    4619        .F      MOV      r1,r3
        0x0000049e:    4810        .H      LDR      r0,[pc,#64] ; [0x4e0] = 0x40080000
        0x000004a0:    f000ff3f    ..?.    BL       I2C_SetSlaveAddr ; 0x1322
        0x000004a4:    480e        .H      LDR      r0,[pc,#56] ; [0x4e0] = 0x40080000
        0x000004a6:    f000fef7    ....    BL       I2C_EnableInt ; 0x1298
        0x000004aa:    2026        &       MOVS     r0,#0x26
        0x000004ac:    f000021f    ....    AND      r2,r0,#0x1f
        0x000004b0:    2101        .!      MOVS     r1,#1
        0x000004b2:    4091        .@      LSLS     r1,r1,r2
        0x000004b4:    0942        B.      LSRS     r2,r0,#5
        0x000004b6:    0092        ..      LSLS     r2,r2,#2
        0x000004b8:    f10222e0    ..."    ADD      r2,r2,#0xe000e000
        0x000004bc:    f8c21100    ....    STR      r1,[r2,#0x100]
        0x000004c0:    bf00        ..      NOP      
        0x000004c2:    f000f85f    .._.    BL       VKL280_Main ; 0x584
        0x000004c6:    2000        .       MOVS     r0,#0
        0x000004c8:    bd10        ..      POP      {r4,pc}
    I2C_STOP
        0x000004ca:    6801        .h      LDR      r1,[r0,#0]
        0x000004cc:    f0410118    A...    ORR      r1,r1,#0x18
        0x000004d0:    6001        .`      STR      r1,[r0,#0]
        0x000004d2:    bf00        ..      NOP      
        0x000004d4:    6801        .h      LDR      r1,[r0,#0]
        0x000004d6:    f0010110    ....    AND      r1,r1,#0x10
        0x000004da:    2900        .)      CMP      r1,#0
        0x000004dc:    d1fa        ..      BNE      0x4d4 ; I2C_STOP + 10
        0x000004de:    4770        pG      BX       lr
    $d
        0x000004e0:    40080000    ...@    DCD    1074266112
        0x000004e4:    20000000    ...     DCD    536870912
        0x000004e8:    20000006    ...     DCD    536870918
        0x000004ec:    20000078    x..     DCD    536871032
        0x000004f0:    20000004    ...     DCD    536870916
        0x000004f4:    20000009    ...     DCD    536870921
        0x000004f8:    20000038    8..     DCD    536870968
        0x000004fc:    20000005    ...     DCD    536870917
        0x00000500:    20000008    ...     DCD    536870920
        0x00000504:    20000007    ...     DCD    536870919
        0x00000508:    40000100    ...@    DCD    1073742080
    $t
    .text
    Disp_All
        0x0000050c:    b570        p.      PUSH     {r4-r6,lr}
        0x0000050e:    4605        .F      MOV      r5,r0
        0x00000510:    2400        .$      MOVS     r4,#0
        0x00000512:    e003        ..      B        0x51c ; Disp_All + 16
        0x00000514:    4868        hH      LDR      r0,[pc,#416] ; [0x6b8] = 0x200000b8
        0x00000516:    5505        .U      STRB     r5,[r0,r4]
        0x00000518:    1c60        `.      ADDS     r0,r4,#1
        0x0000051a:    b2c4        ..      UXTB     r4,r0
        0x0000051c:    2c23        #,      CMP      r4,#0x23
        0x0000051e:    dbf9        ..      BLT      0x514 ; Disp_All + 8
        0x00000520:    2223        #"      MOVS     r2,#0x23
        0x00000522:    4965        eI      LDR      r1,[pc,#404] ; [0x6b8] = 0x200000b8
        0x00000524:    2000        .       MOVS     r0,#0
        0x00000526:    f000f9d3    ....    BL       WritenDataVKL280 ; 0x8d0
        0x0000052a:    bd70        p.      POP      {r4-r6,pc}
    Disp_DotOn
        0x0000052c:    e92d41f0    -..A    PUSH     {r4-r8,lr}
        0x00000530:    4604        .F      MOV      r4,r0
        0x00000532:    460e        .F      MOV      r6,r1
        0x00000534:    4625        %F      MOV      r5,r4
        0x00000536:    2001        .       MOVS     r0,#1
        0x00000538:    40b0        .@      LSLS     r0,r0,r6
        0x0000053a:    b2c7        ..      UXTB     r7,r0
        0x0000053c:    485e        ^H      LDR      r0,[pc,#376] ; [0x6b8] = 0x200000b8
        0x0000053e:    5d40        @]      LDRB     r0,[r0,r5]
        0x00000540:    ea400807    @...    ORR      r8,r0,r7
        0x00000544:    485c        \H      LDR      r0,[pc,#368] ; [0x6b8] = 0x200000b8
        0x00000546:    f8008005    ....    STRB     r8,[r0,r5]
        0x0000054a:    1941        A.      ADDS     r1,r0,r5
        0x0000054c:    2201        ."      MOVS     r2,#1
        0x0000054e:    4628        (F      MOV      r0,r5
        0x00000550:    f000f9be    ....    BL       WritenDataVKL280 ; 0x8d0
        0x00000554:    e8bd81f0    ....    POP      {r4-r8,pc}
    Disp_DotOff
        0x00000558:    e92d41f0    -..A    PUSH     {r4-r8,lr}
        0x0000055c:    4604        .F      MOV      r4,r0
        0x0000055e:    460e        .F      MOV      r6,r1
        0x00000560:    4625        %F      MOV      r5,r4
        0x00000562:    2001        .       MOVS     r0,#1
        0x00000564:    40b0        .@      LSLS     r0,r0,r6
        0x00000566:    b2c7        ..      UXTB     r7,r0
        0x00000568:    4853        SH      LDR      r0,[pc,#332] ; [0x6b8] = 0x200000b8
        0x0000056a:    5d40        @]      LDRB     r0,[r0,r5]
        0x0000056c:    ea200807     ...    BIC      r8,r0,r7
        0x00000570:    4851        QH      LDR      r0,[pc,#324] ; [0x6b8] = 0x200000b8
        0x00000572:    f8008005    ....    STRB     r8,[r0,r5]
        0x00000576:    1941        A.      ADDS     r1,r0,r5
        0x00000578:    2201        ."      MOVS     r2,#1
        0x0000057a:    4628        (F      MOV      r0,r5
        0x0000057c:    f000f9a8    ....    BL       WritenDataVKL280 ; 0x8d0
        0x00000580:    e8bd81f0    ....    POP      {r4-r8,pc}
    VKL280_Main
        0x00000584:    f000fa79    ..y.    BL       VKL280_Init ; 0xa7a
        0x00000588:    2000        .       MOVS     r0,#0
        0x0000058a:    f7ffffbf    ....    BL       Disp_All ; 0x50c
        0x0000058e:    e092        ..      B        0x6b6 ; VKL280_Main + 306
        0x00000590:    2000        .       MOVS     r0,#0
        0x00000592:    f7ffffbb    ....    BL       Disp_All ; 0x50c
        0x00000596:    f000fa0f    ....    BL       VKL280_Enter_Shutoff ; 0x9b8
        0x0000059a:    f2413088    A..0    MOV      r0,#0x1388
        0x0000059e:    f000f8a1    ....    BL       Delay_nmS ; 0x6e4
        0x000005a2:    f000fa70    ..p.    BL       VKL280_Exit_Shutoff ; 0xa86
        0x000005a6:    20ff        .       MOVS     r0,#0xff
        0x000005a8:    f7ffffb0    ....    BL       Disp_All ; 0x50c
        0x000005ac:    f24050dc    @..P    MOV      r0,#0x5dc
        0x000005b0:    f000f898    ....    BL       Delay_nmS ; 0x6e4
        0x000005b4:    2000        .       MOVS     r0,#0
        0x000005b6:    f7ffffa9    ....    BL       Disp_All ; 0x50c
        0x000005ba:    f24050dc    @..P    MOV      r0,#0x5dc
        0x000005be:    f000f891    ....    BL       Delay_nmS ; 0x6e4
        0x000005c2:    2055        U       MOVS     r0,#0x55
        0x000005c4:    f7ffffa2    ....    BL       Disp_All ; 0x50c
        0x000005c8:    2212        ."      MOVS     r2,#0x12
        0x000005ca:    493c        <I      LDR      r1,[pc,#240] ; [0x6bc] = 0x200000db
        0x000005cc:    2000        .       MOVS     r0,#0
        0x000005ce:    f000f9b1    ....    BL       ReadnDataVKL280 ; 0x934
        0x000005d2:    f44f70fa    O..p    MOV      r0,#0x1f4
        0x000005d6:    f000f885    ....    BL       Delay_nmS ; 0x6e4
        0x000005da:    20aa        .       MOVS     r0,#0xaa
        0x000005dc:    f7ffff96    ....    BL       Disp_All ; 0x50c
        0x000005e0:    2212        ."      MOVS     r2,#0x12
        0x000005e2:    4936        6I      LDR      r1,[pc,#216] ; [0x6bc] = 0x200000db
        0x000005e4:    2000        .       MOVS     r0,#0
        0x000005e6:    f000f9a5    ....    BL       ReadnDataVKL280 ; 0x934
        0x000005ea:    f44f70fa    O..p    MOV      r0,#0x1f4
        0x000005ee:    f000f879    ..y.    BL       Delay_nmS ; 0x6e4
        0x000005f2:    2000        .       MOVS     r0,#0
        0x000005f4:    f7ffff8a    ....    BL       Disp_All ; 0x50c
        0x000005f8:    f44f70fa    O..p    MOV      r0,#0x1f4
        0x000005fc:    f000f872    ..r.    BL       Delay_nmS ; 0x6e4
        0x00000600:    2000        .       MOVS     r0,#0
        0x00000602:    492f        /I      LDR      r1,[pc,#188] ; [0x6c0] = 0x2000000a
        0x00000604:    7008        .p      STRB     r0,[r1,#0]
        0x00000606:    e021        !.      B        0x64c ; VKL280_Main + 200
        0x00000608:    2000        .       MOVS     r0,#0
        0x0000060a:    492e        .I      LDR      r1,[pc,#184] ; [0x6c4] = 0x2000000b
        0x0000060c:    7008        .p      STRB     r0,[r1,#0]
        0x0000060e:    e014        ..      B        0x63a ; VKL280_Main + 182
        0x00000610:    482c        ,H      LDR      r0,[pc,#176] ; [0x6c4] = 0x2000000b
        0x00000612:    7801        .x      LDRB     r1,[r0,#0]
        0x00000614:    482a        *H      LDR      r0,[pc,#168] ; [0x6c0] = 0x2000000a
        0x00000616:    7800        .x      LDRB     r0,[r0,#0]
        0x00000618:    f7ffff88    ....    BL       Disp_DotOn ; 0x52c
        0x0000061c:    f44f7096    O..p    MOV      r0,#0x12c
        0x00000620:    f000f860    ..`.    BL       Delay_nmS ; 0x6e4
        0x00000624:    4827        'H      LDR      r0,[pc,#156] ; [0x6c4] = 0x2000000b
        0x00000626:    7801        .x      LDRB     r1,[r0,#0]
        0x00000628:    4825        %H      LDR      r0,[pc,#148] ; [0x6c0] = 0x2000000a
        0x0000062a:    7800        .x      LDRB     r0,[r0,#0]
        0x0000062c:    f7ffff94    ....    BL       Disp_DotOff ; 0x558
        0x00000630:    4824        $H      LDR      r0,[pc,#144] ; [0x6c4] = 0x2000000b
        0x00000632:    7800        .x      LDRB     r0,[r0,#0]
        0x00000634:    1c40        @.      ADDS     r0,r0,#1
        0x00000636:    4923        #I      LDR      r1,[pc,#140] ; [0x6c4] = 0x2000000b
        0x00000638:    7008        .p      STRB     r0,[r1,#0]
        0x0000063a:    4822        "H      LDR      r0,[pc,#136] ; [0x6c4] = 0x2000000b
        0x0000063c:    7800        .x      LDRB     r0,[r0,#0]
        0x0000063e:    2808        .(      CMP      r0,#8
        0x00000640:    dbe6        ..      BLT      0x610 ; VKL280_Main + 140
        0x00000642:    481f        .H      LDR      r0,[pc,#124] ; [0x6c0] = 0x2000000a
        0x00000644:    7800        .x      LDRB     r0,[r0,#0]
        0x00000646:    1c40        @.      ADDS     r0,r0,#1
        0x00000648:    491d        .I      LDR      r1,[pc,#116] ; [0x6c0] = 0x2000000a
        0x0000064a:    7008        .p      STRB     r0,[r1,#0]
        0x0000064c:    481c        .H      LDR      r0,[pc,#112] ; [0x6c0] = 0x2000000a
        0x0000064e:    7800        .x      LDRB     r0,[r0,#0]
        0x00000650:    2823        #(      CMP      r0,#0x23
        0x00000652:    dbd9        ..      BLT      0x608 ; VKL280_Main + 132
        0x00000654:    20ff        .       MOVS     r0,#0xff
        0x00000656:    f7ffff59    ..Y.    BL       Disp_All ; 0x50c
        0x0000065a:    f44f70fa    O..p    MOV      r0,#0x1f4
        0x0000065e:    f000f841    ..A.    BL       Delay_nmS ; 0x6e4
        0x00000662:    2000        .       MOVS     r0,#0
        0x00000664:    4916        .I      LDR      r1,[pc,#88] ; [0x6c0] = 0x2000000a
        0x00000666:    7008        .p      STRB     r0,[r1,#0]
        0x00000668:    e021        !.      B        0x6ae ; VKL280_Main + 298
        0x0000066a:    2000        .       MOVS     r0,#0
        0x0000066c:    4915        .I      LDR      r1,[pc,#84] ; [0x6c4] = 0x2000000b
        0x0000066e:    7008        .p      STRB     r0,[r1,#0]
        0x00000670:    e014        ..      B        0x69c ; VKL280_Main + 280
        0x00000672:    4814        .H      LDR      r0,[pc,#80] ; [0x6c4] = 0x2000000b
        0x00000674:    7801        .x      LDRB     r1,[r0,#0]
        0x00000676:    4812        .H      LDR      r0,[pc,#72] ; [0x6c0] = 0x2000000a
        0x00000678:    7800        .x      LDRB     r0,[r0,#0]
        0x0000067a:    f7ffff6d    ..m.    BL       Disp_DotOff ; 0x558
        0x0000067e:    f44f7096    O..p    MOV      r0,#0x12c
        0x00000682:    f000f82f    ../.    BL       Delay_nmS ; 0x6e4
        0x00000686:    480f        .H      LDR      r0,[pc,#60] ; [0x6c4] = 0x2000000b
        0x00000688:    7801        .x      LDRB     r1,[r0,#0]
        0x0000068a:    480d        .H      LDR      r0,[pc,#52] ; [0x6c0] = 0x2000000a
        0x0000068c:    7800        .x      LDRB     r0,[r0,#0]
        0x0000068e:    f7ffff4d    ..M.    BL       Disp_DotOn ; 0x52c
        0x00000692:    480c        .H      LDR      r0,[pc,#48] ; [0x6c4] = 0x2000000b
        0x00000694:    7800        .x      LDRB     r0,[r0,#0]
        0x00000696:    1c40        @.      ADDS     r0,r0,#1
        0x00000698:    490a        .I      LDR      r1,[pc,#40] ; [0x6c4] = 0x2000000b
        0x0000069a:    7008        .p      STRB     r0,[r1,#0]
        0x0000069c:    4809        .H      LDR      r0,[pc,#36] ; [0x6c4] = 0x2000000b
        0x0000069e:    7800        .x      LDRB     r0,[r0,#0]
        0x000006a0:    2808        .(      CMP      r0,#8
        0x000006a2:    dbe6        ..      BLT      0x672 ; VKL280_Main + 238
        0x000006a4:    4806        .H      LDR      r0,[pc,#24] ; [0x6c0] = 0x2000000a
        0x000006a6:    7800        .x      LDRB     r0,[r0,#0]
        0x000006a8:    1c40        @.      ADDS     r0,r0,#1
        0x000006aa:    4905        .I      LDR      r1,[pc,#20] ; [0x6c0] = 0x2000000a
        0x000006ac:    7008        .p      STRB     r0,[r1,#0]
        0x000006ae:    4804        .H      LDR      r0,[pc,#16] ; [0x6c0] = 0x2000000a
        0x000006b0:    7800        .x      LDRB     r0,[r0,#0]
        0x000006b2:    2823        #(      CMP      r0,#0x23
        0x000006b4:    dbd9        ..      BLT      0x66a ; VKL280_Main + 230
        0x000006b6:    e76b        k.      B        0x590 ; VKL280_Main + 12
    $d
        0x000006b8:    200000b8    ...     DCD    536871096
        0x000006bc:    200000db    ...     DCD    536871131
        0x000006c0:    2000000a    ...     DCD    536870922
        0x000006c4:    2000000b    ...     DCD    536870923
    $t
    .text
    Delay_nuS
        0x000006c8:    e007        ..      B        0x6da ; Delay_nuS + 18
        0x000006ca:    210e        .!      MOVS     r1,#0xe
        0x000006cc:    e000        ..      B        0x6d0 ; Delay_nuS + 8
        0x000006ce:    bf00        ..      NOP      
        0x000006d0:    000a        ..      MOVS     r2,r1
        0x000006d2:    f1a10301    ....    SUB      r3,r1,#1
        0x000006d6:    b2d9        ..      UXTB     r1,r3
        0x000006d8:    d1f9        ..      BNE      0x6ce ; Delay_nuS + 6
        0x000006da:    0002        ..      MOVS     r2,r0
        0x000006dc:    f1a00001    ....    SUB      r0,r0,#1
        0x000006e0:    d1f3        ..      BNE      0x6ca ; Delay_nuS + 2
        0x000006e2:    4770        pG      BX       lr
    Delay_nmS
        0x000006e4:    b510        ..      PUSH     {r4,lr}
        0x000006e6:    4604        .F      MOV      r4,r0
        0x000006e8:    e003        ..      B        0x6f2 ; Delay_nmS + 14
        0x000006ea:    f44f707a    O.zp    MOV      r0,#0x3e8
        0x000006ee:    f7ffffeb    ....    BL       Delay_nuS ; 0x6c8
        0x000006f2:    0020         .      MOVS     r0,r4
        0x000006f4:    f1a40401    ....    SUB      r4,r4,#1
        0x000006f8:    d1f7        ..      BNE      0x6ea ; Delay_nmS + 6
        0x000006fa:    bd10        ..      POP      {r4,pc}
    VKL280_I2CStart
        0x000006fc:    b500        ..      PUSH     {lr}
        0x000006fe:    2001        .       MOVS     r0,#1
        0x00000700:    49e3        .I      LDR      r1,[pc,#908] ; [0xa90] = 0x4000487c
        0x00000702:    6008        .`      STR      r0,[r1,#0]
        0x00000704:    49e2        .I      LDR      r1,[pc,#904] ; [0xa90] = 0x4000487c
        0x00000706:    3928        (9      SUBS     r1,r1,#0x28
        0x00000708:    6008        .`      STR      r0,[r1,#0]
        0x0000070a:    f7ffffdd    ....    BL       Delay_nuS ; 0x6c8
        0x0000070e:    2000        .       MOVS     r0,#0
        0x00000710:    49df        .I      LDR      r1,[pc,#892] ; [0xa90] = 0x4000487c
        0x00000712:    3928        (9      SUBS     r1,r1,#0x28
        0x00000714:    6008        .`      STR      r0,[r1,#0]
        0x00000716:    2001        .       MOVS     r0,#1
        0x00000718:    f7ffffd6    ....    BL       Delay_nuS ; 0x6c8
        0x0000071c:    bd00        ..      POP      {pc}
    VKL280_I2CStop
        0x0000071e:    b500        ..      PUSH     {lr}
        0x00000720:    2001        .       MOVS     r0,#1
        0x00000722:    49db        .I      LDR      r1,[pc,#876] ; [0xa90] = 0x4000487c
        0x00000724:    6008        .`      STR      r0,[r1,#0]
        0x00000726:    2000        .       MOVS     r0,#0
        0x00000728:    49d9        .I      LDR      r1,[pc,#868] ; [0xa90] = 0x4000487c
        0x0000072a:    3928        (9      SUBS     r1,r1,#0x28
        0x0000072c:    6008        .`      STR      r0,[r1,#0]
        0x0000072e:    2001        .       MOVS     r0,#1
        0x00000730:    f7ffffca    ....    BL       Delay_nuS ; 0x6c8
        0x00000734:    2001        .       MOVS     r0,#1
        0x00000736:    49d6        .I      LDR      r1,[pc,#856] ; [0xa90] = 0x4000487c
        0x00000738:    3928        (9      SUBS     r1,r1,#0x28
        0x0000073a:    6008        .`      STR      r0,[r1,#0]
        0x0000073c:    f7ffffc4    ....    BL       Delay_nuS ; 0x6c8
        0x00000740:    bd00        ..      POP      {pc}
    VKL280_I2CSlaveAck
        0x00000742:    b530        0.      PUSH     {r4,r5,lr}
        0x00000744:    2401        .$      MOVS     r4,#1
        0x00000746:    2000        .       MOVS     r0,#0
        0x00000748:    49d1        .I      LDR      r1,[pc,#836] ; [0xa90] = 0x4000487c
        0x0000074a:    6008        .`      STR      r0,[r1,#0]
        0x0000074c:    2001        .       MOVS     r0,#1
        0x0000074e:    f7ffffbb    ....    BL       Delay_nuS ; 0x6c8
        0x00000752:    2001        .       MOVS     r0,#1
        0x00000754:    49ce        .I      LDR      r1,[pc,#824] ; [0xa90] = 0x4000487c
        0x00000756:    6008        .`      STR      r0,[r1,#0]
        0x00000758:    f2427510    B..u    MOV      r5,#0x2710
        0x0000075c:    e007        ..      B        0x76e ; VKL280_I2CSlaveAck + 44
        0x0000075e:    48cc        .H      LDR      r0,[pc,#816] ; [0xa90] = 0x4000487c
        0x00000760:    3828        (8      SUBS     r0,r0,#0x28
        0x00000762:    6800        .h      LDR      r0,[r0,#0]
        0x00000764:    b108        ..      CBZ      r0,0x76a ; VKL280_I2CSlaveAck + 40
        0x00000766:    2401        .$      MOVS     r4,#1
        0x00000768:    e001        ..      B        0x76e ; VKL280_I2CSlaveAck + 44
        0x0000076a:    2400        .$      MOVS     r4,#0
        0x0000076c:    e003        ..      B        0x776 ; VKL280_I2CSlaveAck + 52
        0x0000076e:    0028        (.      MOVS     r0,r5
        0x00000770:    f1a50501    ....    SUB      r5,r5,#1
        0x00000774:    d1f3        ..      BNE      0x75e ; VKL280_I2CSlaveAck + 28
        0x00000776:    bf00        ..      NOP      
        0x00000778:    2000        .       MOVS     r0,#0
        0x0000077a:    49c5        .I      LDR      r1,[pc,#788] ; [0xa90] = 0x4000487c
        0x0000077c:    6008        .`      STR      r0,[r1,#0]
        0x0000077e:    4620         F      MOV      r0,r4
        0x00000780:    bd30        0.      POP      {r4,r5,pc}
    VKL280_I2CSendAck
        0x00000782:    b500        ..      PUSH     {lr}
        0x00000784:    2000        .       MOVS     r0,#0
        0x00000786:    49c2        .I      LDR      r1,[pc,#776] ; [0xa90] = 0x4000487c
        0x00000788:    6008        .`      STR      r0,[r1,#0]
        0x0000078a:    49c1        .I      LDR      r1,[pc,#772] ; [0xa90] = 0x4000487c
        0x0000078c:    3928        (9      SUBS     r1,r1,#0x28
        0x0000078e:    6008        .`      STR      r0,[r1,#0]
        0x00000790:    2002        .       MOVS     r0,#2
        0x00000792:    f7ffff99    ....    BL       Delay_nuS ; 0x6c8
        0x00000796:    2001        .       MOVS     r0,#1
        0x00000798:    49bd        .I      LDR      r1,[pc,#756] ; [0xa90] = 0x4000487c
        0x0000079a:    6008        .`      STR      r0,[r1,#0]
        0x0000079c:    2002        .       MOVS     r0,#2
        0x0000079e:    f7ffff93    ....    BL       Delay_nuS ; 0x6c8
        0x000007a2:    2000        .       MOVS     r0,#0
        0x000007a4:    49ba        .I      LDR      r1,[pc,#744] ; [0xa90] = 0x4000487c
        0x000007a6:    6008        .`      STR      r0,[r1,#0]
        0x000007a8:    2001        .       MOVS     r0,#1
        0x000007aa:    49b9        .I      LDR      r1,[pc,#740] ; [0xa90] = 0x4000487c
        0x000007ac:    3928        (9      SUBS     r1,r1,#0x28
        0x000007ae:    6008        .`      STR      r0,[r1,#0]
        0x000007b0:    bd00        ..      POP      {pc}
    VKL280_I2CSendNAck
        0x000007b2:    b500        ..      PUSH     {lr}
        0x000007b4:    2000        .       MOVS     r0,#0
        0x000007b6:    49b6        .I      LDR      r1,[pc,#728] ; [0xa90] = 0x4000487c
        0x000007b8:    6008        .`      STR      r0,[r1,#0]
        0x000007ba:    2001        .       MOVS     r0,#1
        0x000007bc:    49b4        .I      LDR      r1,[pc,#720] ; [0xa90] = 0x4000487c
        0x000007be:    3928        (9      SUBS     r1,r1,#0x28
        0x000007c0:    6008        .`      STR      r0,[r1,#0]
        0x000007c2:    f7ffff81    ....    BL       Delay_nuS ; 0x6c8
        0x000007c6:    2001        .       MOVS     r0,#1
        0x000007c8:    49b1        .I      LDR      r1,[pc,#708] ; [0xa90] = 0x4000487c
        0x000007ca:    6008        .`      STR      r0,[r1,#0]
        0x000007cc:    f7ffff7c    ..|.    BL       Delay_nuS ; 0x6c8
        0x000007d0:    bd00        ..      POP      {pc}
    VKL280_I2CWRCmd
        0x000007d2:    b530        0.      PUSH     {r4,r5,lr}
        0x000007d4:    4604        .F      MOV      r4,r0
        0x000007d6:    2508        .%      MOVS     r5,#8
        0x000007d8:    e018        ..      B        0x80c ; VKL280_I2CWRCmd + 58
        0x000007da:    2000        .       MOVS     r0,#0
        0x000007dc:    49ac        .I      LDR      r1,[pc,#688] ; [0xa90] = 0x4000487c
        0x000007de:    6008        .`      STR      r0,[r1,#0]
        0x000007e0:    f0040080    ....    AND      r0,r4,#0x80
        0x000007e4:    b120         .      CBZ      r0,0x7f0 ; VKL280_I2CWRCmd + 30
        0x000007e6:    2001        .       MOVS     r0,#1
        0x000007e8:    49a9        .I      LDR      r1,[pc,#676] ; [0xa90] = 0x4000487c
        0x000007ea:    3928        (9      SUBS     r1,r1,#0x28
        0x000007ec:    6008        .`      STR      r0,[r1,#0]
        0x000007ee:    e003        ..      B        0x7f8 ; VKL280_I2CWRCmd + 38
        0x000007f0:    2000        .       MOVS     r0,#0
        0x000007f2:    49a7        .I      LDR      r1,[pc,#668] ; [0xa90] = 0x4000487c
        0x000007f4:    3928        (9      SUBS     r1,r1,#0x28
        0x000007f6:    6008        .`      STR      r0,[r1,#0]
        0x000007f8:    0660        `.      LSLS     r0,r4,#25
        0x000007fa:    0e04        ..      LSRS     r4,r0,#24
        0x000007fc:    2001        .       MOVS     r0,#1
        0x000007fe:    f7ffff63    ..c.    BL       Delay_nuS ; 0x6c8
        0x00000802:    2001        .       MOVS     r0,#1
        0x00000804:    49a2        .I      LDR      r1,[pc,#648] ; [0xa90] = 0x4000487c
        0x00000806:    6008        .`      STR      r0,[r1,#0]
        0x00000808:    f7ffff5e    ..^.    BL       Delay_nuS ; 0x6c8
        0x0000080c:    0028        (.      MOVS     r0,r5
        0x0000080e:    f1a50101    ....    SUB      r1,r5,#1
        0x00000812:    b2cd        ..      UXTB     r5,r1
        0x00000814:    d1e1        ..      BNE      0x7da ; VKL280_I2CWRCmd + 8
        0x00000816:    bd30        0.      POP      {r4,r5,pc}
    VKL280_I2CWRDat
        0x00000818:    b530        0.      PUSH     {r4,r5,lr}
        0x0000081a:    4604        .F      MOV      r4,r0
        0x0000081c:    2508        .%      MOVS     r5,#8
        0x0000081e:    e017        ..      B        0x850 ; VKL280_I2CWRDat + 56
        0x00000820:    2000        .       MOVS     r0,#0
        0x00000822:    499b        .I      LDR      r1,[pc,#620] ; [0xa90] = 0x4000487c
        0x00000824:    6008        .`      STR      r0,[r1,#0]
        0x00000826:    f0040001    ....    AND      r0,r4,#1
        0x0000082a:    b120         .      CBZ      r0,0x836 ; VKL280_I2CWRDat + 30
        0x0000082c:    2001        .       MOVS     r0,#1
        0x0000082e:    4998        .I      LDR      r1,[pc,#608] ; [0xa90] = 0x4000487c
        0x00000830:    3928        (9      SUBS     r1,r1,#0x28
        0x00000832:    6008        .`      STR      r0,[r1,#0]
        0x00000834:    e003        ..      B        0x83e ; VKL280_I2CWRDat + 38
        0x00000836:    2000        .       MOVS     r0,#0
        0x00000838:    4995        .I      LDR      r1,[pc,#596] ; [0xa90] = 0x4000487c
        0x0000083a:    3928        (9      SUBS     r1,r1,#0x28
        0x0000083c:    6008        .`      STR      r0,[r1,#0]
        0x0000083e:    1064        d.      ASRS     r4,r4,#1
        0x00000840:    2001        .       MOVS     r0,#1
        0x00000842:    f7ffff41    ..A.    BL       Delay_nuS ; 0x6c8
        0x00000846:    2001        .       MOVS     r0,#1
        0x00000848:    4991        .I      LDR      r1,[pc,#580] ; [0xa90] = 0x4000487c
        0x0000084a:    6008        .`      STR      r0,[r1,#0]
        0x0000084c:    f7ffff3c    ..<.    BL       Delay_nuS ; 0x6c8
        0x00000850:    0028        (.      MOVS     r0,r5
        0x00000852:    f1a50101    ....    SUB      r1,r5,#1
        0x00000856:    b2cd        ..      UXTB     r5,r1
        0x00000858:    d1e2        ..      BNE      0x820 ; VKL280_I2CWRDat + 8
        0x0000085a:    bd30        0.      POP      {r4,r5,pc}
    VKL280_I2CRDDat
        0x0000085c:    b530        0.      PUSH     {r4,r5,lr}
        0x0000085e:    2400        .$      MOVS     r4,#0
        0x00000860:    2500        .%      MOVS     r5,#0
        0x00000862:    e013        ..      B        0x88c ; VKL280_I2CRDDat + 48
        0x00000864:    1064        d.      ASRS     r4,r4,#1
        0x00000866:    2000        .       MOVS     r0,#0
        0x00000868:    4989        .I      LDR      r1,[pc,#548] ; [0xa90] = 0x4000487c
        0x0000086a:    6008        .`      STR      r0,[r1,#0]
        0x0000086c:    2001        .       MOVS     r0,#1
        0x0000086e:    f7ffff2b    ..+.    BL       Delay_nuS ; 0x6c8
        0x00000872:    2001        .       MOVS     r0,#1
        0x00000874:    4986        .I      LDR      r1,[pc,#536] ; [0xa90] = 0x4000487c
        0x00000876:    6008        .`      STR      r0,[r1,#0]
        0x00000878:    f7ffff26    ..&.    BL       Delay_nuS ; 0x6c8
        0x0000087c:    4884        .H      LDR      r0,[pc,#528] ; [0xa90] = 0x4000487c
        0x0000087e:    3828        (8      SUBS     r0,r0,#0x28
        0x00000880:    6800        .h      LDR      r0,[r0,#0]
        0x00000882:    b108        ..      CBZ      r0,0x888 ; VKL280_I2CRDDat + 44
        0x00000884:    f0440480    D...    ORR      r4,r4,#0x80
        0x00000888:    1c68        h.      ADDS     r0,r5,#1
        0x0000088a:    b2c5        ..      UXTB     r5,r0
        0x0000088c:    2d08        .-      CMP      r5,#8
        0x0000088e:    dbe9        ..      BLT      0x864 ; VKL280_I2CRDDat + 8
        0x00000890:    4620         F      MOV      r0,r4
        0x00000892:    bd30        0.      POP      {r4,r5,pc}
    WriteCmdVKL280
        0x00000894:    b510        ..      PUSH     {r4,lr}
        0x00000896:    4604        .F      MOV      r4,r0
        0x00000898:    f7ffff30    ..0.    BL       VKL280_I2CStart ; 0x6fc
        0x0000089c:    207c        |       MOVS     r0,#0x7c
        0x0000089e:    f7ffff98    ....    BL       VKL280_I2CWRCmd ; 0x7d2
        0x000008a2:    f7ffff4e    ..N.    BL       VKL280_I2CSlaveAck ; 0x742
        0x000008a6:    2801        .(      CMP      r0,#1
        0x000008a8:    d103        ..      BNE      0x8b2 ; WriteCmdVKL280 + 30
        0x000008aa:    f7ffff38    ..8.    BL       VKL280_I2CStop ; 0x71e
        0x000008ae:    2000        .       MOVS     r0,#0
        0x000008b0:    bd10        ..      POP      {r4,pc}
        0x000008b2:    4620         F      MOV      r0,r4
        0x000008b4:    f7ffff8d    ....    BL       VKL280_I2CWRCmd ; 0x7d2
        0x000008b8:    f7ffff43    ..C.    BL       VKL280_I2CSlaveAck ; 0x742
        0x000008bc:    2801        .(      CMP      r0,#1
        0x000008be:    d103        ..      BNE      0x8c8 ; WriteCmdVKL280 + 52
        0x000008c0:    f7ffff2d    ..-.    BL       VKL280_I2CStop ; 0x71e
        0x000008c4:    2000        .       MOVS     r0,#0
        0x000008c6:    e7f3        ..      B        0x8b0 ; WriteCmdVKL280 + 28
        0x000008c8:    f7ffff29    ..).    BL       VKL280_I2CStop ; 0x71e
        0x000008cc:    2000        .       MOVS     r0,#0
        0x000008ce:    e7ef        ..      B        0x8b0 ; WriteCmdVKL280 + 28
    WritenDataVKL280
        0x000008d0:    b5f0        ..      PUSH     {r4-r7,lr}
        0x000008d2:    4607        .F      MOV      r7,r0
        0x000008d4:    460c        .F      MOV      r4,r1
        0x000008d6:    4616        .F      MOV      r6,r2
        0x000008d8:    f7ffff10    ....    BL       VKL280_I2CStart ; 0x6fc
        0x000008dc:    207c        |       MOVS     r0,#0x7c
        0x000008de:    f7ffff78    ..x.    BL       VKL280_I2CWRCmd ; 0x7d2
        0x000008e2:    f7ffff2e    ....    BL       VKL280_I2CSlaveAck ; 0x742
        0x000008e6:    2801        .(      CMP      r0,#1
        0x000008e8:    d103        ..      BNE      0x8f2 ; WritenDataVKL280 + 34
        0x000008ea:    f7ffff18    ....    BL       VKL280_I2CStop ; 0x71e
        0x000008ee:    2000        .       MOVS     r0,#0
        0x000008f0:    bdf0        ..      POP      {r4-r7,pc}
        0x000008f2:    4638        8F      MOV      r0,r7
        0x000008f4:    f7ffff6d    ..m.    BL       VKL280_I2CWRCmd ; 0x7d2
        0x000008f8:    f7ffff23    ..#.    BL       VKL280_I2CSlaveAck ; 0x742
        0x000008fc:    2801        .(      CMP      r0,#1
        0x000008fe:    d103        ..      BNE      0x908 ; WritenDataVKL280 + 56
        0x00000900:    f7ffff0d    ....    BL       VKL280_I2CStop ; 0x71e
        0x00000904:    2000        .       MOVS     r0,#0
        0x00000906:    e7f3        ..      B        0x8f0 ; WritenDataVKL280 + 32
        0x00000908:    2500        .%      MOVS     r5,#0
        0x0000090a:    e00d        ..      B        0x928 ; WritenDataVKL280 + 88
        0x0000090c:    f8140b01    ....    LDRB     r0,[r4],#1
        0x00000910:    f7ffff82    ....    BL       VKL280_I2CWRDat ; 0x818
        0x00000914:    f7ffff15    ....    BL       VKL280_I2CSlaveAck ; 0x742
        0x00000918:    2801        .(      CMP      r0,#1
        0x0000091a:    d103        ..      BNE      0x924 ; WritenDataVKL280 + 84
        0x0000091c:    f7fffeff    ....    BL       VKL280_I2CStop ; 0x71e
        0x00000920:    2000        .       MOVS     r0,#0
        0x00000922:    e7e5        ..      B        0x8f0 ; WritenDataVKL280 + 32
        0x00000924:    1c68        h.      ADDS     r0,r5,#1
        0x00000926:    b2c5        ..      UXTB     r5,r0
        0x00000928:    42b5        .B      CMP      r5,r6
        0x0000092a:    dbef        ..      BLT      0x90c ; WritenDataVKL280 + 60
        0x0000092c:    f7fffef7    ....    BL       VKL280_I2CStop ; 0x71e
        0x00000930:    2000        .       MOVS     r0,#0
        0x00000932:    e7dd        ..      B        0x8f0 ; WritenDataVKL280 + 32
    ReadnDataVKL280
        0x00000934:    b5f0        ..      PUSH     {r4-r7,lr}
        0x00000936:    4607        .F      MOV      r7,r0
        0x00000938:    460c        .F      MOV      r4,r1
        0x0000093a:    4616        .F      MOV      r6,r2
        0x0000093c:    f7fffede    ....    BL       VKL280_I2CStart ; 0x6fc
        0x00000940:    207c        |       MOVS     r0,#0x7c
        0x00000942:    f7ffff46    ..F.    BL       VKL280_I2CWRCmd ; 0x7d2
        0x00000946:    f7fffefc    ....    BL       VKL280_I2CSlaveAck ; 0x742
        0x0000094a:    2801        .(      CMP      r0,#1
        0x0000094c:    d103        ..      BNE      0x956 ; ReadnDataVKL280 + 34
        0x0000094e:    f7fffee6    ....    BL       VKL280_I2CStop ; 0x71e
        0x00000952:    2000        .       MOVS     r0,#0
        0x00000954:    bdf0        ..      POP      {r4-r7,pc}
        0x00000956:    4638        8F      MOV      r0,r7
        0x00000958:    f7ffff3b    ..;.    BL       VKL280_I2CWRCmd ; 0x7d2
        0x0000095c:    f7fffef1    ....    BL       VKL280_I2CSlaveAck ; 0x742
        0x00000960:    2801        .(      CMP      r0,#1
        0x00000962:    d103        ..      BNE      0x96c ; ReadnDataVKL280 + 56
        0x00000964:    f7fffedb    ....    BL       VKL280_I2CStop ; 0x71e
        0x00000968:    2000        .       MOVS     r0,#0
        0x0000096a:    e7f3        ..      B        0x954 ; ReadnDataVKL280 + 32
        0x0000096c:    f7fffed7    ....    BL       VKL280_I2CStop ; 0x71e
        0x00000970:    f7fffec4    ....    BL       VKL280_I2CStart ; 0x6fc
        0x00000974:    207d        }       MOVS     r0,#0x7d
        0x00000976:    f7ffff2c    ..,.    BL       VKL280_I2CWRCmd ; 0x7d2
        0x0000097a:    f7fffee2    ....    BL       VKL280_I2CSlaveAck ; 0x742
        0x0000097e:    2801        .(      CMP      r0,#1
        0x00000980:    d103        ..      BNE      0x98a ; ReadnDataVKL280 + 86
        0x00000982:    f7fffecc    ....    BL       VKL280_I2CStop ; 0x71e
        0x00000986:    2000        .       MOVS     r0,#0
        0x00000988:    e7e4        ..      B        0x954 ; ReadnDataVKL280 + 32
        0x0000098a:    2500        .%      MOVS     r5,#0
        0x0000098c:    e007        ..      B        0x99e ; ReadnDataVKL280 + 106
        0x0000098e:    f7ffff65    ..e.    BL       VKL280_I2CRDDat ; 0x85c
        0x00000992:    f8040b01    ....    STRB     r0,[r4],#1
        0x00000996:    f7fffef4    ....    BL       VKL280_I2CSendAck ; 0x782
        0x0000099a:    1c68        h.      ADDS     r0,r5,#1
        0x0000099c:    b2c5        ..      UXTB     r5,r0
        0x0000099e:    1e70        p.      SUBS     r0,r6,#1
        0x000009a0:    42a8        .B      CMP      r0,r5
        0x000009a2:    dcf4        ..      BGT      0x98e ; ReadnDataVKL280 + 90
        0x000009a4:    f7ffff5a    ..Z.    BL       VKL280_I2CRDDat ; 0x85c
        0x000009a8:    f8040b01    ....    STRB     r0,[r4],#1
        0x000009ac:    f7ffff01    ....    BL       VKL280_I2CSendNAck ; 0x7b2
        0x000009b0:    f7fffeb5    ....    BL       VKL280_I2CStop ; 0x71e
        0x000009b4:    2000        .       MOVS     r0,#0
        0x000009b6:    e7cd        ..      B        0x954 ; ReadnDataVKL280 + 32
    VKL280_Enter_Shutoff
        0x000009b8:    b500        ..      PUSH     {lr}
        0x000009ba:    20f0        .       MOVS     r0,#0xf0
        0x000009bc:    f7ffff6a    ..j.    BL       WriteCmdVKL280 ; 0x894
        0x000009c0:    2000        .       MOVS     r0,#0
        0x000009c2:    bd00        ..      POP      {pc}
    VKL280_SOFTREST
        0x000009c4:    b500        ..      PUSH     {lr}
        0x000009c6:    2002        .       MOVS     r0,#2
        0x000009c8:    f7ffff64    ..d.    BL       WriteCmdVKL280 ; 0x894
        0x000009cc:    2000        .       MOVS     r0,#0
        0x000009ce:    bd00        ..      POP      {pc}
    VKL280_InitSequence
        0x000009d0:    b500        ..      PUSH     {lr}
        0x000009d2:    2064        d       MOVS     r0,#0x64
        0x000009d4:    f7fffe78    ..x.    BL       Delay_nuS ; 0x6c8
        0x000009d8:    f7fffea1    ....    BL       VKL280_I2CStop ; 0x71e
        0x000009dc:    f7fffe8e    ....    BL       VKL280_I2CStart ; 0x6fc
        0x000009e0:    207c        |       MOVS     r0,#0x7c
        0x000009e2:    f7fffef6    ....    BL       VKL280_I2CWRCmd ; 0x7d2
        0x000009e6:    f7fffeac    ....    BL       VKL280_I2CSlaveAck ; 0x742
        0x000009ea:    2801        .(      CMP      r0,#1
        0x000009ec:    d103        ..      BNE      0x9f6 ; VKL280_InitSequence + 38
        0x000009ee:    f7fffe96    ....    BL       VKL280_I2CStop ; 0x71e
        0x000009f2:    2001        .       MOVS     r0,#1
        0x000009f4:    bd00        ..      POP      {pc}
        0x000009f6:    20f2        .       MOVS     r0,#0xf2
        0x000009f8:    f7fffeeb    ....    BL       VKL280_I2CWRCmd ; 0x7d2
        0x000009fc:    f7fffea1    ....    BL       VKL280_I2CSlaveAck ; 0x742
        0x00000a00:    2801        .(      CMP      r0,#1
        0x00000a02:    d103        ..      BNE      0xa0c ; VKL280_InitSequence + 60
        0x00000a04:    f7fffe8b    ....    BL       VKL280_I2CStop ; 0x71e
        0x00000a08:    2001        .       MOVS     r0,#1
        0x00000a0a:    e7f3        ..      B        0x9f4 ; VKL280_InitSequence + 36
        0x00000a0c:    20e0        .       MOVS     r0,#0xe0
        0x00000a0e:    f7fffee0    ....    BL       VKL280_I2CWRCmd ; 0x7d2
        0x00000a12:    f7fffe96    ....    BL       VKL280_I2CSlaveAck ; 0x742
        0x00000a16:    2801        .(      CMP      r0,#1
        0x00000a18:    d103        ..      BNE      0xa22 ; VKL280_InitSequence + 82
        0x00000a1a:    f7fffe80    ....    BL       VKL280_I2CStop ; 0x71e
        0x00000a1e:    2001        .       MOVS     r0,#1
        0x00000a20:    e7e8        ..      B        0x9f4 ; VKL280_InitSequence + 36
        0x00000a22:    20c1        .       MOVS     r0,#0xc1
        0x00000a24:    f7fffed5    ....    BL       VKL280_I2CWRCmd ; 0x7d2
        0x00000a28:    f7fffe8b    ....    BL       VKL280_I2CSlaveAck ; 0x742
        0x00000a2c:    2801        .(      CMP      r0,#1
        0x00000a2e:    d103        ..      BNE      0xa38 ; VKL280_InitSequence + 104
        0x00000a30:    f7fffe75    ..u.    BL       VKL280_I2CStop ; 0x71e
        0x00000a34:    2001        .       MOVS     r0,#1
        0x00000a36:    e7dd        ..      B        0x9f4 ; VKL280_InitSequence + 36
        0x00000a38:    20f5        .       MOVS     r0,#0xf5
        0x00000a3a:    f7fffeca    ....    BL       VKL280_I2CWRCmd ; 0x7d2
        0x00000a3e:    f7fffe80    ....    BL       VKL280_I2CSlaveAck ; 0x742
        0x00000a42:    2801        .(      CMP      r0,#1
        0x00000a44:    d103        ..      BNE      0xa4e ; VKL280_InitSequence + 126
        0x00000a46:    f7fffe6a    ..j.    BL       VKL280_I2CStop ; 0x71e
        0x00000a4a:    2000        .       MOVS     r0,#0
        0x00000a4c:    e7d2        ..      B        0x9f4 ; VKL280_InitSequence + 36
        0x00000a4e:    f7fffe66    ..f.    BL       VKL280_I2CStop ; 0x71e
        0x00000a52:    2000        .       MOVS     r0,#0
        0x00000a54:    e7ce        ..      B        0x9f4 ; VKL280_InitSequence + 36
    VKL280_Lowlevel_Init
        0x00000a56:    b510        ..      PUSH     {r4,lr}
        0x00000a58:    2201        ."      MOVS     r2,#1
        0x00000a5a:    03d1        ..      LSLS     r1,r2,#15
        0x00000a5c:    480d        .H      LDR      r0,[pc,#52] ; [0xa94] = 0x40004040
        0x00000a5e:    f000fb85    ....    BL       GPIO_SetMode ; 0x116c
        0x00000a62:    2203        ."      MOVS     r2,#3
        0x00000a64:    2120         !      MOVS     r1,#0x20
        0x00000a66:    480b        .H      LDR      r0,[pc,#44] ; [0xa94] = 0x40004040
        0x00000a68:    f000fb80    ....    BL       GPIO_SetMode ; 0x116c
        0x00000a6c:    2001        .       MOVS     r0,#1
        0x00000a6e:    4908        .I      LDR      r1,[pc,#32] ; [0xa90] = 0x4000487c
        0x00000a70:    6008        .`      STR      r0,[r1,#0]
        0x00000a72:    4907        .I      LDR      r1,[pc,#28] ; [0xa90] = 0x4000487c
        0x00000a74:    3928        (9      SUBS     r1,r1,#0x28
        0x00000a76:    6008        .`      STR      r0,[r1,#0]
        0x00000a78:    bd10        ..      POP      {r4,pc}
    VKL280_Init
        0x00000a7a:    b510        ..      PUSH     {r4,lr}
        0x00000a7c:    f7ffffeb    ....    BL       VKL280_Lowlevel_Init ; 0xa56
        0x00000a80:    f7ffffa6    ....    BL       VKL280_InitSequence ; 0x9d0
        0x00000a84:    bd10        ..      POP      {r4,pc}
    VKL280_Exit_Shutoff
        0x00000a86:    b510        ..      PUSH     {r4,lr}
        0x00000a88:    f7fffff7    ....    BL       VKL280_Init ; 0xa7a
        0x00000a8c:    bd10        ..      POP      {r4,pc}
    $d
        0x00000a8e:    0000        ..      DCW    0
        0x00000a90:    4000487c    |H.@    DCD    1073760380
        0x00000a94:    40004040    @@.@    DCD    1073758272
    $t
    .text
    SYS_Init
        0x00000a98:    b510        ..      PUSH     {r4,lr}
        0x00000a9a:    2004        .       MOVS     r0,#4
        0x00000a9c:    f000fa92    ....    BL       CLK_EnableXtalRC ; 0xfc4
        0x00000aa0:    2010        .       MOVS     r0,#0x10
        0x00000aa2:    f000f912    ....    BL       CLK_WaitClockReady ; 0xcca
        0x00000aa6:    2100        .!      MOVS     r1,#0
        0x00000aa8:    2007        .       MOVS     r0,#7
        0x00000aaa:    f000f91f    ....    BL       CLK_SetHCLK ; 0xcec
        0x00000aae:    2001        .       MOVS     r0,#1
        0x00000ab0:    f000fa88    ....    BL       CLK_EnableXtalRC ; 0xfc4
        0x00000ab4:    2001        .       MOVS     r0,#1
        0x00000ab6:    f000f908    ....    BL       CLK_WaitClockReady ; 0xcca
        0x00000aba:    4818        .H      LDR      r0,[pc,#96] ; [0xb1c] = 0x44aa200
        0x00000abc:    f000fa02    ....    BL       CLK_SetCoreClock ; 0xec4
        0x00000ac0:    4817        .H      LDR      r0,[pc,#92] ; [0xb20] = 0xa2100011
        0x00000ac2:    f000f877    ..w.    BL       CLK_EnableModuleClock ; 0xbb4
        0x00000ac6:    4817        .H      LDR      r0,[pc,#92] ; [0xb24] = 0x40000008
        0x00000ac8:    f000f874    ..t.    BL       CLK_EnableModuleClock ; 0xbb4
        0x00000acc:    2200        ."      MOVS     r2,#0
        0x00000ace:    2102        .!      MOVS     r1,#2
        0x00000ad0:    4813        .H      LDR      r0,[pc,#76] ; [0xb20] = 0xa2100011
        0x00000ad2:    f000f848    ..H.    BL       CLK_SetModuleClock ; 0xb66
        0x00000ad6:    4814        .H      LDR      r0,[pc,#80] ; [0xb28] = 0x8000011
        0x00000ad8:    f000fb0f    ....    BL       SYS_ResetModule ; 0x10fa
        0x00000adc:    f04f4080    O..@    MOV      r0,#0x40000000
        0x00000ae0:    6c40        @l      LDR      r0,[r0,#0x44]
        0x00000ae2:    f0204070     .p@    BIC      r0,r0,#0xf0000000
        0x00000ae6:    f04f4180    O..A    MOV      r1,#0x40000000
        0x00000aea:    6448        Hd      STR      r0,[r1,#0x44]
        0x00000aec:    4608        .F      MOV      r0,r1
        0x00000aee:    6c40        @l      LDR      r0,[r0,#0x44]
        0x00000af0:    f04040c0    @..@    ORR      r0,r0,#0x60000000
        0x00000af4:    6448        Hd      STR      r0,[r1,#0x44]
        0x00000af6:    4608        .F      MOV      r0,r1
        0x00000af8:    6c80        .l      LDR      r0,[r0,#0x48]
        0x00000afa:    f420007f     ...    BIC      r0,r0,#0xff0000
        0x00000afe:    6488        .d      STR      r0,[r1,#0x48]
        0x00000b00:    4608        .F      MOV      r0,r1
        0x00000b02:    6c80        .l      LDR      r0,[r0,#0x48]
        0x00000b04:    f440104c    @.L.    ORR      r0,r0,#0x330000
        0x00000b08:    6488        .d      STR      r0,[r1,#0x48]
        0x00000b0a:    4808        .H      LDR      r0,[pc,#32] ; [0xb2c] = 0x400040e4
        0x00000b0c:    6800        .h      LDR      r0,[r0,#0]
        0x00000b0e:    f040000c    @...    ORR      r0,r0,#0xc
        0x00000b12:    f04f2140    O.@!    MOV      r1,#0x40004000
        0x00000b16:    f8c100e4    ....    STR      r0,[r1,#0xe4]
        0x00000b1a:    bd10        ..      POP      {r4,pc}
    $d
        0x00000b1c:    044aa200    ..J.    DCD    72000000
        0x00000b20:    a2100011    ....    DCD    2718957585
        0x00000b24:    40000008    ...@    DCD    1073741832
        0x00000b28:    08000011    ....    DCD    134217745
        0x00000b2c:    400040e4    .@.@    DCD    1073758436
    $t
    .text
    CLK_DisableModuleClock
        0x00000b30:    2103        .!      MOVS     r1,#3
        0x00000b32:    ea017190    ...q    AND      r1,r1,r0,LSR #30
        0x00000b36:    0089        ..      LSLS     r1,r1,#2
        0x00000b38:    f1014180    ...A    ADD      r1,r1,#0x40000000
        0x00000b3c:    f8d11204    ....    LDR      r1,[r1,#0x204]
        0x00000b40:    f000031f    ....    AND      r3,r0,#0x1f
        0x00000b44:    2201        ."      MOVS     r2,#1
        0x00000b46:    409a        .@      LSLS     r2,r2,r3
        0x00000b48:    4391        .C      BICS     r1,r1,r2
        0x00000b4a:    2203        ."      MOVS     r2,#3
        0x00000b4c:    ea027290    ...r    AND      r2,r2,r0,LSR #30
        0x00000b50:    0092        ..      LSLS     r2,r2,#2
        0x00000b52:    f1024280    ...B    ADD      r2,r2,#0x40000000
        0x00000b56:    f8c21204    ....    STR      r1,[r2,#0x204]
        0x00000b5a:    4770        pG      BX       lr
    CLK_DisableCKO
        0x00000b5c:    b500        ..      PUSH     {lr}
        0x00000b5e:    48fe        .H      LDR      r0,[pc,#1016] ; [0xf58] = 0x57c00006
        0x00000b60:    f7ffffe6    ....    BL       CLK_DisableModuleClock ; 0xb30
        0x00000b64:    bd00        ..      POP      {pc}
    CLK_SetModuleClock
        0x00000b66:    b5f0        ..      PUSH     {r4-r7,lr}
        0x00000b68:    2300        .#      MOVS     r3,#0
        0x00000b6a:    2400        .$      MOVS     r4,#0
        0x00000b6c:    f3c02587    ...%    UBFX     r5,r0,#10,#8
        0x00000b70:    b16d        m.      CBZ      r5,0xb8e ; CLK_SetModuleClock + 40
        0x00000b72:    f3c04581    ...E    UBFX     r5,r0,#18,#2
        0x00000b76:    4ef9        .N      LDR      r6,[pc,#996] ; [0xf5c] = 0x40000220
        0x00000b78:    eb060485    ....    ADD      r4,r6,r5,LSL #2
        0x00000b7c:    6825        %h      LDR      r5,[r4,#0]
        0x00000b7e:    f3c02687    ...&    UBFX     r6,r0,#10,#8
        0x00000b82:    f3c01744    ..D.    UBFX     r7,r0,#5,#5
        0x00000b86:    40be        .@      LSLS     r6,r6,r7
        0x00000b88:    43b5        .C      BICS     r5,r5,r6
        0x00000b8a:    4315        .C      ORRS     r5,r5,r2
        0x00000b8c:    6025        %`      STR      r5,[r4,#0]
        0x00000b8e:    f3c06542    ..Be    UBFX     r5,r0,#25,#3
        0x00000b92:    b175        u.      CBZ      r5,0xbb2 ; CLK_SetModuleClock + 76
        0x00000b94:    f3c07501    ...u    UBFX     r5,r0,#28,#2
        0x00000b98:    4ef0        .N      LDR      r6,[pc,#960] ; [0xf5c] = 0x40000220
        0x00000b9a:    3e10        .>      SUBS     r6,r6,#0x10
        0x00000b9c:    eb060385    ....    ADD      r3,r6,r5,LSL #2
        0x00000ba0:    681d        .h      LDR      r5,[r3,#0]
        0x00000ba2:    f3c06642    ..Bf    UBFX     r6,r0,#25,#3
        0x00000ba6:    f3c05704    ...W    UBFX     r7,r0,#20,#5
        0x00000baa:    40be        .@      LSLS     r6,r6,r7
        0x00000bac:    43b5        .C      BICS     r5,r5,r6
        0x00000bae:    430d        .C      ORRS     r5,r5,r1
        0x00000bb0:    601d        .`      STR      r5,[r3,#0]
        0x00000bb2:    bdf0        ..      POP      {r4-r7,pc}
    CLK_EnableModuleClock
        0x00000bb4:    2103        .!      MOVS     r1,#3
        0x00000bb6:    ea017190    ...q    AND      r1,r1,r0,LSR #30
        0x00000bba:    0089        ..      LSLS     r1,r1,#2
        0x00000bbc:    f1014180    ...A    ADD      r1,r1,#0x40000000
        0x00000bc0:    f8d11204    ....    LDR      r1,[r1,#0x204]
        0x00000bc4:    f000031f    ....    AND      r3,r0,#0x1f
        0x00000bc8:    2201        ."      MOVS     r2,#1
        0x00000bca:    409a        .@      LSLS     r2,r2,r3
        0x00000bcc:    4311        .C      ORRS     r1,r1,r2
        0x00000bce:    2203        ."      MOVS     r2,#3
        0x00000bd0:    ea027290    ...r    AND      r2,r2,r0,LSR #30
        0x00000bd4:    0092        ..      LSLS     r2,r2,#2
        0x00000bd6:    f1024280    ...B    ADD      r2,r2,#0x40000000
        0x00000bda:    f8c21204    ....    STR      r1,[r2,#0x204]
        0x00000bde:    4770        pG      BX       lr
    CLK_EnableCKO
        0x00000be0:    b570        p.      PUSH     {r4-r6,lr}
        0x00000be2:    4604        .F      MOV      r4,r0
        0x00000be4:    460d        .F      MOV      r5,r1
        0x00000be6:    4616        .F      MOV      r6,r2
        0x00000be8:    f0450010    E...    ORR      r0,r5,#0x10
        0x00000bec:    ea401046    @.F.    ORR      r0,r0,r6,LSL #5
        0x00000bf0:    49da        .I      LDR      r1,[pc,#872] ; [0xf5c] = 0x40000220
        0x00000bf2:    3140        @1      ADDS     r1,r1,#0x40
        0x00000bf4:    6008        .`      STR      r0,[r1,#0]
        0x00000bf6:    48d8        .H      LDR      r0,[pc,#864] ; [0xf58] = 0x57c00006
        0x00000bf8:    f7ffffdc    ....    BL       CLK_EnableModuleClock ; 0xbb4
        0x00000bfc:    2200        ."      MOVS     r2,#0
        0x00000bfe:    4621        !F      MOV      r1,r4
        0x00000c00:    48d5        .H      LDR      r0,[pc,#852] ; [0xf58] = 0x57c00006
        0x00000c02:    f7ffffb0    ....    BL       CLK_SetModuleClock ; 0xb66
        0x00000c06:    bd70        p.      POP      {r4-r6,pc}
    CLK_PowerDown
        0x00000c08:    48d5        .H      LDR      r0,[pc,#852] ; [0xf60] = 0xe000ed10
        0x00000c0a:    6800        .h      LDR      r0,[r0,#0]
        0x00000c0c:    f0400004    @...    ORR      r0,r0,#4
        0x00000c10:    49d3        .I      LDR      r1,[pc,#844] ; [0xf60] = 0xe000ed10
        0x00000c12:    6008        .`      STR      r0,[r1,#0]
        0x00000c14:    48d1        .H      LDR      r0,[pc,#836] ; [0xf5c] = 0x40000220
        0x00000c16:    3820         8      SUBS     r0,r0,#0x20
        0x00000c18:    6800        .h      LDR      r0,[r0,#0]
        0x00000c1a:    f44070c0    @..p    ORR      r0,r0,#0x180
        0x00000c1e:    0689        ..      LSLS     r1,r1,#26
        0x00000c20:    f8c10200    ....    STR      r0,[r1,#0x200]
        0x00000c24:    bf30        0.      WFI      
        0x00000c26:    4770        pG      BX       lr
    CLK_Idle
        0x00000c28:    48cd        .H      LDR      r0,[pc,#820] ; [0xf60] = 0xe000ed10
        0x00000c2a:    6800        .h      LDR      r0,[r0,#0]
        0x00000c2c:    f0200004     ...    BIC      r0,r0,#4
        0x00000c30:    49cb        .I      LDR      r1,[pc,#812] ; [0xf60] = 0xe000ed10
        0x00000c32:    6008        .`      STR      r0,[r1,#0]
        0x00000c34:    48c9        .H      LDR      r0,[pc,#804] ; [0xf5c] = 0x40000220
        0x00000c36:    3820         8      SUBS     r0,r0,#0x20
        0x00000c38:    6800        .h      LDR      r0,[r0,#0]
        0x00000c3a:    f0200080     ...    BIC      r0,r0,#0x80
        0x00000c3e:    0689        ..      LSLS     r1,r1,#26
        0x00000c40:    f8c10200    ....    STR      r0,[r1,#0x200]
        0x00000c44:    bf30        0.      WFI      
        0x00000c46:    4770        pG      BX       lr
    CLK_GetHXTFreq
        0x00000c48:    48c4        .H      LDR      r0,[pc,#784] ; [0xf5c] = 0x40000220
        0x00000c4a:    3820         8      SUBS     r0,r0,#0x20
        0x00000c4c:    6800        .h      LDR      r0,[r0,#0]
        0x00000c4e:    f0000001    ....    AND      r0,r0,#1
        0x00000c52:    b108        ..      CBZ      r0,0xc58 ; CLK_GetHXTFreq + 16
        0x00000c54:    48c3        .H      LDR      r0,[pc,#780] ; [0xf64] = 0xb71b00
        0x00000c56:    4770        pG      BX       lr
        0x00000c58:    2000        .       MOVS     r0,#0
        0x00000c5a:    e7fc        ..      B        0xc56 ; CLK_GetHXTFreq + 14
    CLK_GetLXTFreq
        0x00000c5c:    48bf        .H      LDR      r0,[pc,#764] ; [0xf5c] = 0x40000220
        0x00000c5e:    3820         8      SUBS     r0,r0,#0x20
        0x00000c60:    6800        .h      LDR      r0,[r0,#0]
        0x00000c62:    f0000002    ....    AND      r0,r0,#2
        0x00000c66:    b110        ..      CBZ      r0,0xc6e ; CLK_GetLXTFreq + 18
        0x00000c68:    f44f4000    O..@    MOV      r0,#0x8000
        0x00000c6c:    4770        pG      BX       lr
        0x00000c6e:    2000        .       MOVS     r0,#0
        0x00000c70:    e7fc        ..      B        0xc6c ; CLK_GetLXTFreq + 16
    CLK_GetPCLK0Freq
        0x00000c72:    b510        ..      PUSH     {r4,lr}
        0x00000c74:    f000fc38    ..8.    BL       SystemCoreClockUpdate ; 0x14e8
        0x00000c78:    48b8        .H      LDR      r0,[pc,#736] ; [0xf5c] = 0x40000220
        0x00000c7a:    3810        .8      SUBS     r0,r0,#0x10
        0x00000c7c:    6800        .h      LDR      r0,[r0,#0]
        0x00000c7e:    f0000040    ..@.    AND      r0,r0,#0x40
        0x00000c82:    b118        ..      CBZ      r0,0xc8c ; CLK_GetPCLK0Freq + 26
        0x00000c84:    48b8        .H      LDR      r0,[pc,#736] ; [0xf68] = 0x2000000c
        0x00000c86:    6800        .h      LDR      r0,[r0,#0]
        0x00000c88:    0840        @.      LSRS     r0,r0,#1
        0x00000c8a:    bd10        ..      POP      {r4,pc}
        0x00000c8c:    48b6        .H      LDR      r0,[pc,#728] ; [0xf68] = 0x2000000c
        0x00000c8e:    6800        .h      LDR      r0,[r0,#0]
        0x00000c90:    e7fb        ..      B        0xc8a ; CLK_GetPCLK0Freq + 24
    CLK_GetPCLK1Freq
        0x00000c92:    b510        ..      PUSH     {r4,lr}
        0x00000c94:    f000fc28    ..(.    BL       SystemCoreClockUpdate ; 0x14e8
        0x00000c98:    48b0        .H      LDR      r0,[pc,#704] ; [0xf5c] = 0x40000220
        0x00000c9a:    3810        .8      SUBS     r0,r0,#0x10
        0x00000c9c:    6800        .h      LDR      r0,[r0,#0]
        0x00000c9e:    f0000080    ....    AND      r0,r0,#0x80
        0x00000ca2:    b118        ..      CBZ      r0,0xcac ; CLK_GetPCLK1Freq + 26
        0x00000ca4:    48b0        .H      LDR      r0,[pc,#704] ; [0xf68] = 0x2000000c
        0x00000ca6:    6800        .h      LDR      r0,[r0,#0]
        0x00000ca8:    0840        @.      LSRS     r0,r0,#1
        0x00000caa:    bd10        ..      POP      {r4,pc}
        0x00000cac:    48ae        .H      LDR      r0,[pc,#696] ; [0xf68] = 0x2000000c
        0x00000cae:    6800        .h      LDR      r0,[r0,#0]
        0x00000cb0:    e7fb        ..      B        0xcaa ; CLK_GetPCLK1Freq + 24
    CLK_GetHCLKFreq
        0x00000cb2:    b510        ..      PUSH     {r4,lr}
        0x00000cb4:    f000fc18    ....    BL       SystemCoreClockUpdate ; 0x14e8
        0x00000cb8:    48ab        .H      LDR      r0,[pc,#684] ; [0xf68] = 0x2000000c
        0x00000cba:    6800        .h      LDR      r0,[r0,#0]
        0x00000cbc:    bd10        ..      POP      {r4,pc}
    CLK_GetCPUFreq
        0x00000cbe:    b510        ..      PUSH     {r4,lr}
        0x00000cc0:    f000fc12    ....    BL       SystemCoreClockUpdate ; 0x14e8
        0x00000cc4:    48a8        .H      LDR      r0,[pc,#672] ; [0xf68] = 0x2000000c
        0x00000cc6:    6800        .h      LDR      r0,[r0,#0]
        0x00000cc8:    bd10        ..      POP      {r4,pc}
    CLK_WaitClockReady
        0x00000cca:    4601        .F      MOV      r1,r0
        0x00000ccc:    4aa7        .J      LDR      r2,[pc,#668] ; [0xf6c] = 0x20f580
        0x00000cce:    e005        ..      B        0xcdc ; CLK_WaitClockReady + 18
        0x00000cd0:    1e10        ..      SUBS     r0,r2,#0
        0x00000cd2:    f1a20201    ....    SUB      r2,r2,#1
        0x00000cd6:    dc01        ..      BGT      0xcdc ; CLK_WaitClockReady + 18
        0x00000cd8:    2000        .       MOVS     r0,#0
        0x00000cda:    4770        pG      BX       lr
        0x00000cdc:    489f        .H      LDR      r0,[pc,#636] ; [0xf5c] = 0x40000220
        0x00000cde:    3030        00      ADDS     r0,r0,#0x30
        0x00000ce0:    6800        .h      LDR      r0,[r0,#0]
        0x00000ce2:    4008        .@      ANDS     r0,r0,r1
        0x00000ce4:    4288        .B      CMP      r0,r1
        0x00000ce6:    d1f3        ..      BNE      0xcd0 ; CLK_WaitClockReady + 6
        0x00000ce8:    2001        .       MOVS     r0,#1
        0x00000cea:    e7f6        ..      B        0xcda ; CLK_WaitClockReady + 16
    CLK_SetHCLK
        0x00000cec:    b570        p.      PUSH     {r4-r6,lr}
        0x00000cee:    4604        .F      MOV      r4,r0
        0x00000cf0:    460d        .F      MOV      r5,r1
        0x00000cf2:    489a        .H      LDR      r0,[pc,#616] ; [0xf5c] = 0x40000220
        0x00000cf4:    3030        00      ADDS     r0,r0,#0x30
        0x00000cf6:    6800        .h      LDR      r0,[r0,#0]
        0x00000cf8:    f0000610    ....    AND      r6,r0,#0x10
        0x00000cfc:    f04f4080    O..@    MOV      r0,#0x40000000
        0x00000d00:    f8d00200    ....    LDR      r0,[r0,#0x200]
        0x00000d04:    f0400004    @...    ORR      r0,r0,#4
        0x00000d08:    4994        .I      LDR      r1,[pc,#592] ; [0xf5c] = 0x40000220
        0x00000d0a:    3920         9      SUBS     r1,r1,#0x20
        0x00000d0c:    6008        .`      STR      r0,[r1,#0]
        0x00000d0e:    2010        .       MOVS     r0,#0x10
        0x00000d10:    f7ffffdb    ....    BL       CLK_WaitClockReady ; 0xcca
        0x00000d14:    4891        .H      LDR      r0,[pc,#580] ; [0xf5c] = 0x40000220
        0x00000d16:    3810        .8      SUBS     r0,r0,#0x10
        0x00000d18:    6800        .h      LDR      r0,[r0,#0]
        0x00000d1a:    f0200007     ...    BIC      r0,r0,#7
        0x00000d1e:    1dc0        ..      ADDS     r0,r0,#7
        0x00000d20:    f04f4180    O..A    MOV      r1,#0x40000000
        0x00000d24:    f8c10210    ....    STR      r0,[r1,#0x210]
        0x00000d28:    488c        .H      LDR      r0,[pc,#560] ; [0xf5c] = 0x40000220
        0x00000d2a:    6800        .h      LDR      r0,[r0,#0]
        0x00000d2c:    f020000f     ...    BIC      r0,r0,#0xf
        0x00000d30:    4328        (C      ORRS     r0,r0,r5
        0x00000d32:    f8c10220    .. .    STR      r0,[r1,#0x220]
        0x00000d36:    4889        .H      LDR      r0,[pc,#548] ; [0xf5c] = 0x40000220
        0x00000d38:    3810        .8      SUBS     r0,r0,#0x10
        0x00000d3a:    6800        .h      LDR      r0,[r0,#0]
        0x00000d3c:    f0200007     ...    BIC      r0,r0,#7
        0x00000d40:    4320         C      ORRS     r0,r0,r4
        0x00000d42:    4986        .I      LDR      r1,[pc,#536] ; [0xf5c] = 0x40000220
        0x00000d44:    3910        .9      SUBS     r1,r1,#0x10
        0x00000d46:    6008        .`      STR      r0,[r1,#0]
        0x00000d48:    f000fbce    ....    BL       SystemCoreClockUpdate ; 0x14e8
        0x00000d4c:    b946        F.      CBNZ     r6,0xd60 ; CLK_SetHCLK + 116
        0x00000d4e:    4883        .H      LDR      r0,[pc,#524] ; [0xf5c] = 0x40000220
        0x00000d50:    3820         8      SUBS     r0,r0,#0x20
        0x00000d52:    6800        .h      LDR      r0,[r0,#0]
        0x00000d54:    f0200004     ...    BIC      r0,r0,#4
        0x00000d58:    f04f4180    O..A    MOV      r1,#0x40000000
        0x00000d5c:    f8c10200    ....    STR      r0,[r1,#0x200]
        0x00000d60:    bd70        p.      POP      {r4-r6,pc}
    CLK_DisablePLL
        0x00000d62:    487e        ~H      LDR      r0,[pc,#504] ; [0xf5c] = 0x40000220
        0x00000d64:    3020         0      ADDS     r0,r0,#0x20
        0x00000d66:    6800        .h      LDR      r0,[r0,#0]
        0x00000d68:    f4403080    @..0    ORR      r0,r0,#0x10000
        0x00000d6c:    f04f4180    O..A    MOV      r1,#0x40000000
        0x00000d70:    f8c10240    ..@.    STR      r0,[r1,#0x240]
        0x00000d74:    4770        pG      BX       lr
    CLK_EnablePLL
        0x00000d76:    e92d4ff3    -..O    PUSH     {r0,r1,r4-r11,lr}
        0x00000d7a:    b085        ..      SUB      sp,sp,#0x14
        0x00000d7c:    460c        .F      MOV      r4,r1
        0x00000d7e:    f7fffff0    ....    BL       CLK_DisablePLL ; 0xd62
        0x00000d82:    9805        ..      LDR      r0,[sp,#0x14]
        0x00000d84:    b988        ..      CBNZ     r0,0xdaa ; CLK_EnablePLL + 52
        0x00000d86:    4875        uH      LDR      r0,[pc,#468] ; [0xf5c] = 0x40000220
        0x00000d88:    3820         8      SUBS     r0,r0,#0x20
        0x00000d8a:    6800        .h      LDR      r0,[r0,#0]
        0x00000d8c:    f0400001    @...    ORR      r0,r0,#1
        0x00000d90:    f04f4180    O..A    MOV      r1,#0x40000000
        0x00000d94:    f8c10200    ....    STR      r0,[r1,#0x200]
        0x00000d98:    2001        .       MOVS     r0,#1
        0x00000d9a:    f7ffff96    ....    BL       CLK_WaitClockReady ; 0xcca
        0x00000d9e:    f04f0b00    O...    MOV      r11,#0
        0x00000da2:    f8df81c0    ....    LDR      r8,[pc,#448] ; [0xf64] = 0xb71b00
        0x00000da6:    2502        .%      MOVS     r5,#2
        0x00000da8:    e010        ..      B        0xdcc ; CLK_EnablePLL + 86
        0x00000daa:    486c        lH      LDR      r0,[pc,#432] ; [0xf5c] = 0x40000220
        0x00000dac:    3820         8      SUBS     r0,r0,#0x20
        0x00000dae:    6800        .h      LDR      r0,[r0,#0]
        0x00000db0:    f0400004    @...    ORR      r0,r0,#4
        0x00000db4:    f04f4180    O..A    MOV      r1,#0x40000000
        0x00000db8:    f8c10200    ....    STR      r0,[r1,#0x200]
        0x00000dbc:    2010        .       MOVS     r0,#0x10
        0x00000dbe:    f7ffff84    ....    BL       CLK_WaitClockReady ; 0xcca
        0x00000dc2:    f44f2b00    O..+    MOV      r11,#0x80000
        0x00000dc6:    f8df81a8    ....    LDR      r8,[pc,#424] ; [0xf70] = 0x1518000
        0x00000dca:    2504        .%      MOVS     r5,#4
        0x00000dcc:    4869        iH      LDR      r0,[pc,#420] ; [0xf74] = 0x1dcd6500
        0x00000dce:    4284        .B      CMP      r4,r0
        0x00000dd0:    d804        ..      BHI      0xddc ; CLK_EnablePLL + 102
        0x00000dd2:    1040        @.      ASRS     r0,r0,#1
        0x00000dd4:    4284        .B      CMP      r4,r0
        0x00000dd6:    d901        ..      BLS      0xddc ; CLK_EnablePLL + 102
        0x00000dd8:    2700        .'      MOVS     r7,#0
        0x00000dda:    e012        ..      B        0xe02 ; CLK_EnablePLL + 140
        0x00000ddc:    4866        fH      LDR      r0,[pc,#408] ; [0xf78] = 0xee6b280
        0x00000dde:    4284        .B      CMP      r4,r0
        0x00000de0:    d805        ..      BHI      0xdee ; CLK_EnablePLL + 120
        0x00000de2:    1040        @.      ASRS     r0,r0,#1
        0x00000de4:    4284        .B      CMP      r4,r0
        0x00000de6:    d902        ..      BLS      0xdee ; CLK_EnablePLL + 120
        0x00000de8:    2701        .'      MOVS     r7,#1
        0x00000dea:    0064        d.      LSLS     r4,r4,#1
        0x00000dec:    e009        ..      B        0xe02 ; CLK_EnablePLL + 140
        0x00000dee:    4863        cH      LDR      r0,[pc,#396] ; [0xf7c] = 0x7735940
        0x00000df0:    4284        .B      CMP      r4,r0
        0x00000df2:    d805        ..      BHI      0xe00 ; CLK_EnablePLL + 138
        0x00000df4:    4862        bH      LDR      r0,[pc,#392] ; [0xf80] = 0x2faf080
        0x00000df6:    4284        .B      CMP      r4,r0
        0x00000df8:    d302        ..      BCC      0xe00 ; CLK_EnablePLL + 138
        0x00000dfa:    2703        .'      MOVS     r7,#3
        0x00000dfc:    00a4        ..      LSLS     r4,r4,#2
        0x00000dfe:    e000        ..      B        0xe02 ; CLK_EnablePLL + 140
        0x00000e00:    e04e        N.      B        0xea0 ; CLK_EnablePLL + 298
        0x00000e02:    f04f30ff    O..0    MOV      r0,#0xffffffff
        0x00000e06:    9003        ..      STR      r0,[sp,#0xc]
        0x00000e08:    2000        .       MOVS     r0,#0
        0x00000e0a:    9001        ..      STR      r0,[sp,#4]
        0x00000e0c:    9002        ..      STR      r0,[sp,#8]
        0x00000e0e:    e02c        ,.      B        0xe6a ; CLK_EnablePLL + 244
        0x00000e10:    fbb8faf5    ....    UDIV     r10,r8,r5
        0x00000e14:    485b        [H      LDR      r0,[pc,#364] ; [0xf84] = 0x186a00
        0x00000e16:    4582        .E      CMP      r10,r0
        0x00000e18:    d926        &.      BLS      0xe68 ; CLK_EnablePLL + 242
        0x00000e1a:    485b        [H      LDR      r0,[pc,#364] ; [0xf88] = 0xf42400
        0x00000e1c:    4582        .E      CMP      r10,r0
        0x00000e1e:    d223        #.      BCS      0xe68 ; CLK_EnablePLL + 242
        0x00000e20:    f04f0902    O...    MOV      r9,#2
        0x00000e24:    e01b        ..      B        0xe5e ; CLK_EnablePLL + 232
        0x00000e26:    fb0af609    ....    MUL      r6,r10,r9
        0x00000e2a:    4858        XH      LDR      r0,[pc,#352] ; [0xf8c] = 0xbebc200
        0x00000e2c:    4286        .B      CMP      r6,r0
        0x00000e2e:    d314        ..      BCC      0xe5a ; CLK_EnablePLL + 228
        0x00000e30:    4850        PH      LDR      r0,[pc,#320] ; [0xf74] = 0x1dcd6500
        0x00000e32:    4286        .B      CMP      r6,r0
        0x00000e34:    d811        ..      BHI      0xe5a ; CLK_EnablePLL + 228
        0x00000e36:    42a6        .B      CMP      r6,r4
        0x00000e38:    d901        ..      BLS      0xe3e ; CLK_EnablePLL + 200
        0x00000e3a:    1b30        0.      SUBS     r0,r6,r4
        0x00000e3c:    e000        ..      B        0xe40 ; CLK_EnablePLL + 202
        0x00000e3e:    1ba0        ..      SUBS     r0,r4,r6
        0x00000e40:    9004        ..      STR      r0,[sp,#0x10]
        0x00000e42:    e9dd1003    ....    LDRD     r1,r0,[sp,#0xc]
        0x00000e46:    4288        .B      CMP      r0,r1
        0x00000e48:    d207        ..      BCS      0xe5a ; CLK_EnablePLL + 228
        0x00000e4a:    9804        ..      LDR      r0,[sp,#0x10]
        0x00000e4c:    9003        ..      STR      r0,[sp,#0xc]
        0x00000e4e:    9501        ..      STR      r5,[sp,#4]
        0x00000e50:    f8cd9008    ....    STR      r9,[sp,#8]
        0x00000e54:    9803        ..      LDR      r0,[sp,#0xc]
        0x00000e56:    b900        ..      CBNZ     r0,0xe5a ; CLK_EnablePLL + 228
        0x00000e58:    e005        ..      B        0xe66 ; CLK_EnablePLL + 240
        0x00000e5a:    f1090901    ....    ADD      r9,r9,#1
        0x00000e5e:    f2402001    @..     MOV      r0,#0x201
        0x00000e62:    4581        .E      CMP      r9,r0
        0x00000e64:    d9df        ..      BLS      0xe26 ; CLK_EnablePLL + 176
        0x00000e66:    bf00        ..      NOP      
        0x00000e68:    1c6d        m.      ADDS     r5,r5,#1
        0x00000e6a:    2d21        !-      CMP      r5,#0x21
        0x00000e6c:    d9d0        ..      BLS      0xe10 ; CLK_EnablePLL + 154
        0x00000e6e:    ea4b3187    K..1    ORR      r1,r11,r7,LSL #14
        0x00000e72:    9801        ..      LDR      r0,[sp,#4]
        0x00000e74:    1e80        ..      SUBS     r0,r0,#2
        0x00000e76:    ea412140    A.@!    ORR      r1,r1,r0,LSL #9
        0x00000e7a:    9802        ..      LDR      r0,[sp,#8]
        0x00000e7c:    1e80        ..      SUBS     r0,r0,#2
        0x00000e7e:    4301        .C      ORRS     r1,r1,r0
        0x00000e80:    4836        6H      LDR      r0,[pc,#216] ; [0xf5c] = 0x40000220
        0x00000e82:    3020         0      ADDS     r0,r0,#0x20
        0x00000e84:    6001        .`      STR      r1,[r0,#0]
        0x00000e86:    2004        .       MOVS     r0,#4
        0x00000e88:    f7ffff1f    ....    BL       CLK_WaitClockReady ; 0xcca
        0x00000e8c:    1c78        x.      ADDS     r0,r7,#1
        0x00000e8e:    9901        ..      LDR      r1,[sp,#4]
        0x00000e90:    4348        HC      MULS     r0,r1,r0
        0x00000e92:    fbb8f0f0    ....    UDIV     r0,r8,r0
        0x00000e96:    9902        ..      LDR      r1,[sp,#8]
        0x00000e98:    4348        HC      MULS     r0,r1,r0
        0x00000e9a:    b007        ..      ADD      sp,sp,#0x1c
        0x00000e9c:    e8bd8ff0    ....    POP      {r4-r11,pc}
        0x00000ea0:    9805        ..      LDR      r0,[sp,#0x14]
        0x00000ea2:    b928        (.      CBNZ     r0,0xeb0 ; CLK_EnablePLL + 314
        0x00000ea4:    f24c002e    L...    MOV      r0,#0xc02e
        0x00000ea8:    492c        ,I      LDR      r1,[pc,#176] ; [0xf5c] = 0x40000220
        0x00000eaa:    3120         1      ADDS     r1,r1,#0x20
        0x00000eac:    6008        .`      STR      r0,[r1,#0]
        0x00000eae:    e003        ..      B        0xeb8 ; CLK_EnablePLL + 322
        0x00000eb0:    4837        7H      LDR      r0,[pc,#220] ; [0xf90] = 0x8c432
        0x00000eb2:    492a        *I      LDR      r1,[pc,#168] ; [0xf5c] = 0x40000220
        0x00000eb4:    3120         1      ADDS     r1,r1,#0x20
        0x00000eb6:    6008        .`      STR      r0,[r1,#0]
        0x00000eb8:    2004        .       MOVS     r0,#4
        0x00000eba:    f7ffff06    ....    BL       CLK_WaitClockReady ; 0xcca
        0x00000ebe:    f000f8ba    ....    BL       CLK_GetPLLClockFreq ; 0x1036
        0x00000ec2:    e7ea        ..      B        0xe9a ; CLK_EnablePLL + 292
    CLK_SetCoreClock
        0x00000ec4:    b570        p.      PUSH     {r4-r6,lr}
        0x00000ec6:    4604        .F      MOV      r4,r0
        0x00000ec8:    4824        $H      LDR      r0,[pc,#144] ; [0xf5c] = 0x40000220
        0x00000eca:    3030        00      ADDS     r0,r0,#0x30
        0x00000ecc:    6800        .h      LDR      r0,[r0,#0]
        0x00000ece:    f0000510    ....    AND      r5,r0,#0x10
        0x00000ed2:    4830        0H      LDR      r0,[pc,#192] ; [0xf94] = 0x44aa200
        0x00000ed4:    4284        .B      CMP      r4,r0
        0x00000ed6:    d900        ..      BLS      0xeda ; CLK_SetCoreClock + 22
        0x00000ed8:    4604        .F      MOV      r4,r0
        0x00000eda:    482f        /H      LDR      r0,[pc,#188] ; [0xf98] = 0x17d7840
        0x00000edc:    4284        .B      CMP      r4,r0
        0x00000ede:    d200        ..      BCS      0xee2 ; CLK_SetCoreClock + 30
        0x00000ee0:    4604        .F      MOV      r4,r0
        0x00000ee2:    481e        .H      LDR      r0,[pc,#120] ; [0xf5c] = 0x40000220
        0x00000ee4:    3820         8      SUBS     r0,r0,#0x20
        0x00000ee6:    6800        .h      LDR      r0,[r0,#0]
        0x00000ee8:    f0400004    @...    ORR      r0,r0,#4
        0x00000eec:    f04f4180    O..A    MOV      r1,#0x40000000
        0x00000ef0:    f8c10200    ....    STR      r0,[r1,#0x200]
        0x00000ef4:    2010        .       MOVS     r0,#0x10
        0x00000ef6:    f7fffee8    ....    BL       CLK_WaitClockReady ; 0xcca
        0x00000efa:    f04f4080    O..@    MOV      r0,#0x40000000
        0x00000efe:    f8d00210    ....    LDR      r0,[r0,#0x210]
        0x00000f02:    f0400007    @...    ORR      r0,r0,#7
        0x00000f06:    f04f4180    O..A    MOV      r1,#0x40000000
        0x00000f0a:    f8c10210    ....    STR      r0,[r1,#0x210]
        0x00000f0e:    4608        .F      MOV      r0,r1
        0x00000f10:    f8d00220    .. .    LDR      r0,[r0,#0x220]
        0x00000f14:    f020000f     ...    BIC      r0,r0,#0xf
        0x00000f18:    f8c10220    .. .    STR      r0,[r1,#0x220]
        0x00000f1c:    480f        .H      LDR      r0,[pc,#60] ; [0xf5c] = 0x40000220
        0x00000f1e:    3030        00      ADDS     r0,r0,#0x30
        0x00000f20:    6800        .h      LDR      r0,[r0,#0]
        0x00000f22:    f0000001    ....    AND      r0,r0,#1
        0x00000f26:    b128        (.      CBZ      r0,0xf34 ; CLK_SetCoreClock + 112
        0x00000f28:    0061        a.      LSLS     r1,r4,#1
        0x00000f2a:    2000        .       MOVS     r0,#0
        0x00000f2c:    f7ffff23    ..#.    BL       CLK_EnablePLL ; 0xd76
        0x00000f30:    4604        .F      MOV      r4,r0
        0x00000f32:    e00a        ..      B        0xf4a ; CLK_SetCoreClock + 134
        0x00000f34:    0061        a.      LSLS     r1,r4,#1
        0x00000f36:    f44f2000    O..     MOV      r0,#0x80000
        0x00000f3a:    f7ffff1c    ....    BL       CLK_EnablePLL ; 0xd76
        0x00000f3e:    4604        .F      MOV      r4,r0
        0x00000f40:    4806        .H      LDR      r0,[pc,#24] ; [0xf5c] = 0x40000220
        0x00000f42:    3030        00      ADDS     r0,r0,#0x30
        0x00000f44:    6800        .h      LDR      r0,[r0,#0]
        0x00000f46:    f0000510    ....    AND      r5,r0,#0x10
        0x00000f4a:    2101        .!      MOVS     r1,#1
        0x00000f4c:    2002        .       MOVS     r0,#2
        0x00000f4e:    f7fffecd    ....    BL       CLK_SetHCLK ; 0xcec
        0x00000f52:    bb5d        ].      CBNZ     r5,0xfac ; CLK_SetCoreClock + 232
        0x00000f54:    4801        .H      LDR      r0,[pc,#4] ; [0xf5c] = 0x40000220
        0x00000f56:    e021        !.      B        0xf9c ; CLK_SetCoreClock + 216
    $d
        0x00000f58:    57c00006    ...W    DCD    1472200710
        0x00000f5c:    40000220     ..@    DCD    1073742368
        0x00000f60:    e000ed10    ....    DCD    3758157072
        0x00000f64:    00b71b00    ....    DCD    12000000
        0x00000f68:    2000000c    ...     DCD    536870924
        0x00000f6c:    0020f580    .. .    DCD    2160000
        0x00000f70:    01518000    ..Q.    DCD    22118400
        0x00000f74:    1dcd6500    .e..    DCD    500000000
        0x00000f78:    0ee6b280    ....    DCD    250000000
        0x00000f7c:    07735940    @Ys.    DCD    125000000
        0x00000f80:    02faf080    ....    DCD    50000000
        0x00000f84:    00186a00    .j..    DCD    1600000
        0x00000f88:    00f42400    .$..    DCD    16000000
        0x00000f8c:    0bebc200    ....    DCD    200000000
        0x00000f90:    0008c432    2...    DCD    574514
        0x00000f94:    044aa200    ..J.    DCD    72000000
        0x00000f98:    017d7840    @x}.    DCD    25000000
    $t
        0x00000f9c:    3820         8      SUBS     r0,r0,#0x20
        0x00000f9e:    6800        .h      LDR      r0,[r0,#0]
        0x00000fa0:    f0200004     ...    BIC      r0,r0,#4
        0x00000fa4:    f04f4180    O..A    MOV      r1,#0x40000000
        0x00000fa8:    f8c10200    ....    STR      r0,[r1,#0x200]
        0x00000fac:    0860        `.      LSRS     r0,r4,#1
        0x00000fae:    bd70        p.      POP      {r4-r6,pc}
    CLK_SetSysTickClockSrc
        0x00000fb0:    4936        6I      LDR      r1,[pc,#216] ; [0x108c] = 0x40000210
        0x00000fb2:    6809        .h      LDR      r1,[r1,#0]
        0x00000fb4:    f0210138    !.8.    BIC      r1,r1,#0x38
        0x00000fb8:    4301        .C      ORRS     r1,r1,r0
        0x00000fba:    f04f4280    O..B    MOV      r2,#0x40000000
        0x00000fbe:    f8c21210    ....    STR      r1,[r2,#0x210]
        0x00000fc2:    4770        pG      BX       lr
    CLK_EnableXtalRC
        0x00000fc4:    4931        1I      LDR      r1,[pc,#196] ; [0x108c] = 0x40000210
        0x00000fc6:    3910        .9      SUBS     r1,r1,#0x10
        0x00000fc8:    6809        .h      LDR      r1,[r1,#0]
        0x00000fca:    4301        .C      ORRS     r1,r1,r0
        0x00000fcc:    f04f4280    O..B    MOV      r2,#0x40000000
        0x00000fd0:    f8c21200    ....    STR      r1,[r2,#0x200]
        0x00000fd4:    4770        pG      BX       lr
    CLK_DisableXtalRC
        0x00000fd6:    492d        -I      LDR      r1,[pc,#180] ; [0x108c] = 0x40000210
        0x00000fd8:    3910        .9      SUBS     r1,r1,#0x10
        0x00000fda:    6809        .h      LDR      r1,[r1,#0]
        0x00000fdc:    4381        .C      BICS     r1,r1,r0
        0x00000fde:    f04f4280    O..B    MOV      r2,#0x40000000
        0x00000fe2:    f8c21200    ....    STR      r1,[r2,#0x200]
        0x00000fe6:    4770        pG      BX       lr
    CLK_EnableSysTick
        0x00000fe8:    2200        ."      MOVS     r2,#0
        0x00000fea:    f04f23e0    O..#    MOV      r3,#0xe000e000
        0x00000fee:    611a        .a      STR      r2,[r3,#0x10]
        0x00000ff0:    2804        .(      CMP      r0,#4
        0x00000ff2:    d105        ..      BNE      0x1000 ; CLK_EnableSysTick + 24
        0x00000ff4:    461a        .F      MOV      r2,r3
        0x00000ff6:    6912        .i      LDR      r2,[r2,#0x10]
        0x00000ff8:    f0420204    B...    ORR      r2,r2,#4
        0x00000ffc:    611a        .a      STR      r2,[r3,#0x10]
        0x00000ffe:    e008        ..      B        0x1012 ; CLK_EnableSysTick + 42
        0x00001000:    4a22        "J      LDR      r2,[pc,#136] ; [0x108c] = 0x40000210
        0x00001002:    6812        .h      LDR      r2,[r2,#0]
        0x00001004:    f0220238    ".8.    BIC      r2,r2,#0x38
        0x00001008:    4302        .C      ORRS     r2,r2,r0
        0x0000100a:    f04f4380    O..C    MOV      r3,#0x40000000
        0x0000100e:    f8c32210    ..."    STR      r2,[r3,#0x210]
        0x00001012:    f04f22e0    O.."    MOV      r2,#0xe000e000
        0x00001016:    6151        Qa      STR      r1,[r2,#0x14]
        0x00001018:    2200        ."      MOVS     r2,#0
        0x0000101a:    f04f23e0    O..#    MOV      r3,#0xe000e000
        0x0000101e:    619a        .a      STR      r2,[r3,#0x18]
        0x00001020:    461a        .F      MOV      r2,r3
        0x00001022:    6912        .i      LDR      r2,[r2,#0x10]
        0x00001024:    f0420203    B...    ORR      r2,r2,#3
        0x00001028:    611a        .a      STR      r2,[r3,#0x10]
        0x0000102a:    4770        pG      BX       lr
    CLK_DisableSysTick
        0x0000102c:    2000        .       MOVS     r0,#0
        0x0000102e:    f04f21e0    O..!    MOV      r1,#0xe000e000
        0x00001032:    6108        .a      STR      r0,[r1,#0x10]
        0x00001034:    4770        pG      BX       lr
    CLK_GetPLLClockFreq
        0x00001036:    b5f8        ..      PUSH     {r3-r7,lr}
        0x00001038:    2600        .&      MOVS     r6,#0
        0x0000103a:    a015        ..      ADR      r0,{pc}+0x56 ; 0x1090
        0x0000103c:    6800        .h      LDR      r0,[r0,#0]
        0x0000103e:    9000        ..      STR      r0,[sp,#0]
        0x00001040:    4812        .H      LDR      r0,[pc,#72] ; [0x108c] = 0x40000210
        0x00001042:    3030        00      ADDS     r0,r0,#0x30
        0x00001044:    6801        .h      LDR      r1,[r0,#0]
        0x00001046:    f40120a0    ...     AND      r0,r1,#0x50000
        0x0000104a:    b108        ..      CBZ      r0,0x1050 ; CLK_GetPLLClockFreq + 26
        0x0000104c:    2000        .       MOVS     r0,#0
        0x0000104e:    bdf8        ..      POP      {r3-r7,pc}
        0x00001050:    f4012000    ...     AND      r0,r1,#0x80000
        0x00001054:    b108        ..      CBZ      r0,0x105a ; CLK_GetPLLClockFreq + 36
        0x00001056:    4a0f        .J      LDR      r2,[pc,#60] ; [0x1094] = 0x1518000
        0x00001058:    e000        ..      B        0x105c ; CLK_GetPLLClockFreq + 38
        0x0000105a:    4a0f        .J      LDR      r2,[pc,#60] ; [0x1098] = 0xb71b00
        0x0000105c:    f4013000    ...0    AND      r0,r1,#0x20000
        0x00001060:    b108        ..      CBZ      r0,0x1066 ; CLK_GetPLLClockFreq + 48
        0x00001062:    4610        .F      MOV      r0,r2
        0x00001064:    e7f3        ..      B        0x104e ; CLK_GetPLLClockFreq + 24
        0x00001066:    f3c13781    ...7    UBFX     r7,r1,#14,#2
        0x0000106a:    f81d4007    ...@    LDRB     r4,[sp,r7]
        0x0000106e:    f3c10008    ....    UBFX     r0,r1,#0,#9
        0x00001072:    1c83        ..      ADDS     r3,r0,#2
        0x00001074:    f3c12044    ..D     UBFX     r0,r1,#9,#5
        0x00001078:    1c85        ..      ADDS     r5,r0,#2
        0x0000107a:    0890        ..      LSRS     r0,r2,#2
        0x0000107c:    4358        XC      MULS     r0,r3,r0
        0x0000107e:    fb15f704    ....    SMULBB   r7,r5,r4
        0x00001082:    fbb0f0f7    ....    UDIV     r0,r0,r7
        0x00001086:    0086        ..      LSLS     r6,r0,#2
        0x00001088:    4630        0F      MOV      r0,r6
        0x0000108a:    e7e0        ..      B        0x104e ; CLK_GetPLLClockFreq + 24
    $d
        0x0000108c:    40000210    ...@    DCD    1073742352
        0x00001090:    04020201    ....    DCD    67240449
        0x00001094:    01518000    ..Q.    DCD    22118400
        0x00001098:    00b71b00    ....    DCD    12000000
    $t
    .text
    SYS_ClearResetSrc
        0x0000109c:    f04f4180    O..A    MOV      r1,#0x40000000
        0x000010a0:    6849        Ih      LDR      r1,[r1,#4]
        0x000010a2:    4301        .C      ORRS     r1,r1,r0
        0x000010a4:    f04f4280    O..B    MOV      r2,#0x40000000
        0x000010a8:    6051        Q`      STR      r1,[r2,#4]
        0x000010aa:    4770        pG      BX       lr
    SYS_GetBODStatus
        0x000010ac:    f04f4080    O..@    MOV      r0,#0x40000000
        0x000010b0:    6980        .i      LDR      r0,[r0,#0x18]
        0x000010b2:    f3c01080    ....    UBFX     r0,r0,#6,#1
        0x000010b6:    4770        pG      BX       lr
    SYS_GetResetSrc
        0x000010b8:    f04f4080    O..@    MOV      r0,#0x40000000
        0x000010bc:    6840        @h      LDR      r0,[r0,#4]
        0x000010be:    4770        pG      BX       lr
    SYS_IsRegLocked
        0x000010c0:    4829        )H      LDR      r0,[pc,#164] ; [0x1168] = 0x40000100
        0x000010c2:    6800        .h      LDR      r0,[r0,#0]
        0x000010c4:    f0000001    ....    AND      r0,r0,#1
        0x000010c8:    f0800001    ....    EOR      r0,r0,#1
        0x000010cc:    4770        pG      BX       lr
    SYS_ReadPDID
        0x000010ce:    f04f4080    O..@    MOV      r0,#0x40000000
        0x000010d2:    6800        .h      LDR      r0,[r0,#0]
        0x000010d4:    4770        pG      BX       lr
    SYS_ResetChip
        0x000010d6:    f04f4080    O..@    MOV      r0,#0x40000000
        0x000010da:    6880        .h      LDR      r0,[r0,#8]
        0x000010dc:    f0400001    @...    ORR      r0,r0,#1
        0x000010e0:    f04f4180    O..A    MOV      r1,#0x40000000
        0x000010e4:    6088        .`      STR      r0,[r1,#8]
        0x000010e6:    4770        pG      BX       lr
    SYS_ResetCPU
        0x000010e8:    f04f4080    O..@    MOV      r0,#0x40000000
        0x000010ec:    6880        .h      LDR      r0,[r0,#8]
        0x000010ee:    f0400002    @...    ORR      r0,r0,#2
        0x000010f2:    f04f4180    O..A    MOV      r1,#0x40000000
        0x000010f6:    6088        .`      STR      r0,[r1,#8]
        0x000010f8:    4770        pG      BX       lr
    SYS_ResetModule
        0x000010fa:    0e01        ..      LSRS     r1,r0,#24
        0x000010fc:    f1014180    ...A    ADD      r1,r1,#0x40000000
        0x00001100:    6889        .h      LDR      r1,[r1,#8]
        0x00001102:    2201        ."      MOVS     r2,#1
        0x00001104:    4082        .@      LSLS     r2,r2,r0
        0x00001106:    4311        .C      ORRS     r1,r1,r2
        0x00001108:    0e02        ..      LSRS     r2,r0,#24
        0x0000110a:    f1024280    ...B    ADD      r2,r2,#0x40000000
        0x0000110e:    6091        .`      STR      r1,[r2,#8]
        0x00001110:    0e01        ..      LSRS     r1,r0,#24
        0x00001112:    f1014180    ...A    ADD      r1,r1,#0x40000000
        0x00001116:    688a        .h      LDR      r2,[r1,#8]
        0x00001118:    2101        .!      MOVS     r1,#1
        0x0000111a:    4081        .@      LSLS     r1,r1,r0
        0x0000111c:    ea220101    "...    BIC      r1,r2,r1
        0x00001120:    0e02        ..      LSRS     r2,r0,#24
        0x00001122:    f1024280    ...B    ADD      r2,r2,#0x40000000
        0x00001126:    6091        .`      STR      r1,[r2,#8]
        0x00001128:    4770        pG      BX       lr
    SYS_EnableBOD
        0x0000112a:    f04f4280    O..B    MOV      r2,#0x40000000
        0x0000112e:    6992        .i      LDR      r2,[r2,#0x18]
        0x00001130:    f0420201    B...    ORR      r2,r2,#1
        0x00001134:    f04f4380    O..C    MOV      r3,#0x40000000
        0x00001138:    619a        .a      STR      r2,[r3,#0x18]
        0x0000113a:    461a        .F      MOV      r2,r3
        0x0000113c:    6992        .i      LDR      r2,[r2,#0x18]
        0x0000113e:    f0220208    "...    BIC      r2,r2,#8
        0x00001142:    4302        .C      ORRS     r2,r2,r0
        0x00001144:    619a        .a      STR      r2,[r3,#0x18]
        0x00001146:    461a        .F      MOV      r2,r3
        0x00001148:    6992        .i      LDR      r2,[r2,#0x18]
        0x0000114a:    f0220206    "...    BIC      r2,r2,#6
        0x0000114e:    430a        .C      ORRS     r2,r2,r1
        0x00001150:    619a        .a      STR      r2,[r3,#0x18]
        0x00001152:    4770        pG      BX       lr
    SYS_DisableBOD
        0x00001154:    f04f4080    O..@    MOV      r0,#0x40000000
        0x00001158:    6980        .i      LDR      r0,[r0,#0x18]
        0x0000115a:    f0200001     ...    BIC      r0,r0,#1
        0x0000115e:    f04f4180    O..A    MOV      r1,#0x40000000
        0x00001162:    6188        .a      STR      r0,[r1,#0x18]
        0x00001164:    4770        pG      BX       lr
    $d
        0x00001166:    0000        ..      DCW    0
        0x00001168:    40000100    ...@    DCD    1073742080
    $t
    .text
    GPIO_SetMode
        0x0000116c:    b570        p.      PUSH     {r4-r6,lr}
        0x0000116e:    4603        .F      MOV      r3,r0
        0x00001170:    2000        .       MOVS     r0,#0
        0x00001172:    e00e        ..      B        0x1192 ; GPIO_SetMode + 38
        0x00001174:    2401        .$      MOVS     r4,#1
        0x00001176:    4084        .@      LSLS     r4,r4,r0
        0x00001178:    400c        .@      ANDS     r4,r4,r1
        0x0000117a:    b14c        L.      CBZ      r4,0x1190 ; GPIO_SetMode + 36
        0x0000117c:    681c        .h      LDR      r4,[r3,#0]
        0x0000117e:    0046        F.      LSLS     r6,r0,#1
        0x00001180:    2503        .%      MOVS     r5,#3
        0x00001182:    40b5        .@      LSLS     r5,r5,r6
        0x00001184:    43ac        .C      BICS     r4,r4,r5
        0x00001186:    0045        E.      LSLS     r5,r0,#1
        0x00001188:    fa02f505    ....    LSL      r5,r2,r5
        0x0000118c:    432c        ,C      ORRS     r4,r4,r5
        0x0000118e:    601c        .`      STR      r4,[r3,#0]
        0x00001190:    1c40        @.      ADDS     r0,r0,#1
        0x00001192:    2810        .(      CMP      r0,#0x10
        0x00001194:    d3ee        ..      BCC      0x1174 ; GPIO_SetMode + 8
        0x00001196:    bd70        p.      POP      {r4-r6,pc}
    GPIO_EnableInt
        0x00001198:    b510        ..      PUSH     {r4,lr}
        0x0000119a:    6984        .i      LDR      r4,[r0,#0x18]
        0x0000119c:    0e13        ..      LSRS     r3,r2,#24
        0x0000119e:    408b        .@      LSLS     r3,r3,r1
        0x000011a0:    431c        .C      ORRS     r4,r4,r3
        0x000011a2:    6184        .a      STR      r4,[r0,#0x18]
        0x000011a4:    69c4        .i      LDR      r4,[r0,#0x1c]
        0x000011a6:    f022437f    "..C    BIC      r3,r2,#0xff000000
        0x000011aa:    408b        .@      LSLS     r3,r3,r1
        0x000011ac:    431c        .C      ORRS     r4,r4,r3
        0x000011ae:    61c4        .a      STR      r4,[r0,#0x1c]
        0x000011b0:    bd10        ..      POP      {r4,pc}
    GPIO_DisableInt
        0x000011b2:    6982        .i      LDR      r2,[r0,#0x18]
        0x000011b4:    2301        .#      MOVS     r3,#1
        0x000011b6:    408b        .@      LSLS     r3,r3,r1
        0x000011b8:    439a        .C      BICS     r2,r2,r3
        0x000011ba:    6182        .a      STR      r2,[r0,#0x18]
        0x000011bc:    69c2        .i      LDR      r2,[r0,#0x1c]
        0x000011be:    f04f1301    O...    MOV      r3,#0x10001
        0x000011c2:    408b        .@      LSLS     r3,r3,r1
        0x000011c4:    439a        .C      BICS     r2,r2,r3
        0x000011c6:    61c2        .a      STR      r2,[r0,#0x1c]
        0x000011c8:    4770        pG      BX       lr
        0x000011ca:    0000        ..      MOVS     r0,r0
    .text
    I2C_Open
        0x000011cc:    e92d41f0    -..A    PUSH     {r4-r8,lr}
        0x000011d0:    4604        .F      MOV      r4,r0
        0x000011d2:    460f        .F      MOV      r7,r1
        0x000011d4:    48c2        .H      LDR      r0,[pc,#776] ; [0x14e0] = 0x40081000
        0x000011d6:    4284        .B      CMP      r4,r0
        0x000011d8:    d103        ..      BNE      0x11e2 ; I2C_Open + 22
        0x000011da:    f7fffd5a    ..Z.    BL       CLK_GetPCLK1Freq ; 0xc92
        0x000011de:    4605        .F      MOV      r5,r0
        0x000011e0:    e002        ..      B        0x11e8 ; I2C_Open + 28
        0x000011e2:    f7fffd46    ..F.    BL       CLK_GetPCLK0Freq ; 0xc72
        0x000011e6:    4605        .F      MOV      r5,r0
        0x000011e8:    eb050085    ....    ADD      r0,r5,r5,LSL #2
        0x000011ec:    0040        @.      LSLS     r0,r0,#1
        0x000011ee:    00b9        ..      LSLS     r1,r7,#2
        0x000011f0:    fbb0f0f1    ....    UDIV     r0,r0,r1
        0x000011f4:    1d40        @.      ADDS     r0,r0,#5
        0x000011f6:    210a        .!      MOVS     r1,#0xa
        0x000011f8:    fbb0f0f1    ....    UDIV     r0,r0,r1
        0x000011fc:    1e46        F.      SUBS     r6,r0,#1
        0x000011fe:    6126        &a      STR      r6,[r4,#0x10]
        0x00001200:    6820         h      LDR      r0,[r4,#0]
        0x00001202:    f0400040    @.@.    ORR      r0,r0,#0x40
        0x00001206:    6020         `      STR      r0,[r4,#0]
        0x00001208:    1c70        p.      ADDS     r0,r6,#1
        0x0000120a:    0080        ..      LSLS     r0,r0,#2
        0x0000120c:    fbb5f0f0    ....    UDIV     r0,r5,r0
        0x00001210:    e8bd81f0    ....    POP      {r4-r8,pc}
    I2C_Close
        0x00001214:    49b3        .I      LDR      r1,[pc,#716] ; [0x14e4] = 0x40080000
        0x00001216:    4288        .B      CMP      r0,r1
        0x00001218:    d10b        ..      BNE      0x1232 ; I2C_Close + 30
        0x0000121a:    02c1        ..      LSLS     r1,r0,#11
        0x0000121c:    68c9        .h      LDR      r1,[r1,#0xc]
        0x0000121e:    f4417180    A..q    ORR      r1,r1,#0x100
        0x00001222:    02c2        ..      LSLS     r2,r0,#11
        0x00001224:    60d1        .`      STR      r1,[r2,#0xc]
        0x00001226:    02c1        ..      LSLS     r1,r0,#11
        0x00001228:    68c9        .h      LDR      r1,[r1,#0xc]
        0x0000122a:    f4217180    !..q    BIC      r1,r1,#0x100
        0x0000122e:    60d1        .`      STR      r1,[r2,#0xc]
        0x00001230:    e00d        ..      B        0x124e ; I2C_Close + 58
        0x00001232:    49ab        .I      LDR      r1,[pc,#684] ; [0x14e0] = 0x40081000
        0x00001234:    4288        .B      CMP      r0,r1
        0x00001236:    d10a        ..      BNE      0x124e ; I2C_Close + 58
        0x00001238:    0481        ..      LSLS     r1,r0,#18
        0x0000123a:    68c9        .h      LDR      r1,[r1,#0xc]
        0x0000123c:    f4417100    A..q    ORR      r1,r1,#0x200
        0x00001240:    0482        ..      LSLS     r2,r0,#18
        0x00001242:    60d1        .`      STR      r1,[r2,#0xc]
        0x00001244:    0481        ..      LSLS     r1,r0,#18
        0x00001246:    68c9        .h      LDR      r1,[r1,#0xc]
        0x00001248:    f4217100    !..q    BIC      r1,r1,#0x200
        0x0000124c:    60d1        .`      STR      r1,[r2,#0xc]
        0x0000124e:    6801        .h      LDR      r1,[r0,#0]
        0x00001250:    f0210140    !.@.    BIC      r1,r1,#0x40
        0x00001254:    6001        .`      STR      r1,[r0,#0]
        0x00001256:    4770        pG      BX       lr
    I2C_ClearTimeoutFlag
        0x00001258:    6941        Ai      LDR      r1,[r0,#0x14]
        0x0000125a:    f0410101    A...    ORR      r1,r1,#1
        0x0000125e:    6141        Aa      STR      r1,[r0,#0x14]
        0x00001260:    4770        pG      BX       lr
    I2C_Trigger
        0x00001262:    b570        p.      PUSH     {r4-r6,lr}
        0x00001264:    4604        .F      MOV      r4,r0
        0x00001266:    9d04        ..      LDR      r5,[sp,#0x10]
        0x00001268:    2000        .       MOVS     r0,#0
        0x0000126a:    b109        ..      CBZ      r1,0x1270 ; I2C_Trigger + 14
        0x0000126c:    f0400020    @. .    ORR      r0,r0,#0x20
        0x00001270:    b10a        ..      CBZ      r2,0x1276 ; I2C_Trigger + 20
        0x00001272:    f0400010    @...    ORR      r0,r0,#0x10
        0x00001276:    b10b        ..      CBZ      r3,0x127c ; I2C_Trigger + 26
        0x00001278:    f0400008    @...    ORR      r0,r0,#8
        0x0000127c:    b10d        ..      CBZ      r5,0x1282 ; I2C_Trigger + 32
        0x0000127e:    f0400004    @...    ORR      r0,r0,#4
        0x00001282:    6826        &h      LDR      r6,[r4,#0]
        0x00001284:    f026063c    &.<.    BIC      r6,r6,#0x3c
        0x00001288:    4306        .C      ORRS     r6,r6,r0
        0x0000128a:    6026        &`      STR      r6,[r4,#0]
        0x0000128c:    bd70        p.      POP      {r4-r6,pc}
    I2C_DisableInt
        0x0000128e:    6801        .h      LDR      r1,[r0,#0]
        0x00001290:    f0210180    !...    BIC      r1,r1,#0x80
        0x00001294:    6001        .`      STR      r1,[r0,#0]
        0x00001296:    4770        pG      BX       lr
    I2C_EnableInt
        0x00001298:    6801        .h      LDR      r1,[r0,#0]
        0x0000129a:    f0410180    A...    ORR      r1,r1,#0x80
        0x0000129e:    6001        .`      STR      r1,[r0,#0]
        0x000012a0:    4770        pG      BX       lr
    I2C_GetBusClockFreq
        0x000012a2:    b570        p.      PUSH     {r4-r6,lr}
        0x000012a4:    4605        .F      MOV      r5,r0
        0x000012a6:    692e        .i      LDR      r6,[r5,#0x10]
        0x000012a8:    488d        .H      LDR      r0,[pc,#564] ; [0x14e0] = 0x40081000
        0x000012aa:    4285        .B      CMP      r5,r0
        0x000012ac:    d103        ..      BNE      0x12b6 ; I2C_GetBusClockFreq + 20
        0x000012ae:    f7fffcf0    ....    BL       CLK_GetPCLK1Freq ; 0xc92
        0x000012b2:    4604        .F      MOV      r4,r0
        0x000012b4:    e002        ..      B        0x12bc ; I2C_GetBusClockFreq + 26
        0x000012b6:    f7fffcdc    ....    BL       CLK_GetPCLK0Freq ; 0xc72
        0x000012ba:    4604        .F      MOV      r4,r0
        0x000012bc:    1c70        p.      ADDS     r0,r6,#1
        0x000012be:    0080        ..      LSLS     r0,r0,#2
        0x000012c0:    fbb4f0f0    ....    UDIV     r0,r4,r0
        0x000012c4:    bd70        p.      POP      {r4-r6,pc}
    I2C_SetBusClockFreq
        0x000012c6:    e92d41f0    -..A    PUSH     {r4-r8,lr}
        0x000012ca:    4605        .F      MOV      r5,r0
        0x000012cc:    460f        .F      MOV      r7,r1
        0x000012ce:    4884        .H      LDR      r0,[pc,#528] ; [0x14e0] = 0x40081000
        0x000012d0:    4285        .B      CMP      r5,r0
        0x000012d2:    d103        ..      BNE      0x12dc ; I2C_SetBusClockFreq + 22
        0x000012d4:    f7fffcdd    ....    BL       CLK_GetPCLK1Freq ; 0xc92
        0x000012d8:    4604        .F      MOV      r4,r0
        0x000012da:    e002        ..      B        0x12e2 ; I2C_SetBusClockFreq + 28
        0x000012dc:    f7fffcc9    ....    BL       CLK_GetPCLK0Freq ; 0xc72
        0x000012e0:    4604        .F      MOV      r4,r0
        0x000012e2:    eb040084    ....    ADD      r0,r4,r4,LSL #2
        0x000012e6:    0040        @.      LSLS     r0,r0,#1
        0x000012e8:    00b9        ..      LSLS     r1,r7,#2
        0x000012ea:    fbb0f0f1    ....    UDIV     r0,r0,r1
        0x000012ee:    1d40        @.      ADDS     r0,r0,#5
        0x000012f0:    210a        .!      MOVS     r1,#0xa
        0x000012f2:    fbb0f0f1    ....    UDIV     r0,r0,r1
        0x000012f6:    1e46        F.      SUBS     r6,r0,#1
        0x000012f8:    612e        .a      STR      r6,[r5,#0x10]
        0x000012fa:    1c70        p.      ADDS     r0,r6,#1
        0x000012fc:    0080        ..      LSLS     r0,r0,#2
        0x000012fe:    fbb4f0f0    ....    UDIV     r0,r4,r0
        0x00001302:    e8bd81f0    ....    POP      {r4-r8,pc}
    I2C_GetIntFlag
        0x00001306:    4601        .F      MOV      r1,r0
        0x00001308:    6808        .h      LDR      r0,[r1,#0]
        0x0000130a:    f3c000c0    ....    UBFX     r0,r0,#3,#1
        0x0000130e:    4770        pG      BX       lr
    I2C_GetStatus
        0x00001310:    4601        .F      MOV      r1,r0
        0x00001312:    68c8        .h      LDR      r0,[r1,#0xc]
        0x00001314:    4770        pG      BX       lr
    I2C_GetData
        0x00001316:    4601        .F      MOV      r1,r0
        0x00001318:    6888        .h      LDR      r0,[r1,#8]
        0x0000131a:    b2c0        ..      UXTB     r0,r0
        0x0000131c:    4770        pG      BX       lr
    I2C_SetData
        0x0000131e:    6081        .`      STR      r1,[r0,#8]
        0x00001320:    4770        pG      BX       lr
    I2C_SetSlaveAddr
        0x00001322:    b510        ..      PUSH     {r4,lr}
        0x00001324:    b199        ..      CBZ      r1,0x134e ; I2C_SetSlaveAddr + 44
        0x00001326:    2901        .)      CMP      r1,#1
        0x00001328:    d004        ..      BEQ      0x1334 ; I2C_SetSlaveAddr + 18
        0x0000132a:    2902        .)      CMP      r1,#2
        0x0000132c:    d006        ..      BEQ      0x133c ; I2C_SetSlaveAddr + 26
        0x0000132e:    2903        .)      CMP      r1,#3
        0x00001330:    d10c        ..      BNE      0x134c ; I2C_SetSlaveAddr + 42
        0x00001332:    e007        ..      B        0x1344 ; I2C_SetSlaveAddr + 34
        0x00001334:    ea430442    C.B.    ORR      r4,r3,r2,LSL #1
        0x00001338:    6184        .a      STR      r4,[r0,#0x18]
        0x0000133a:    e00c        ..      B        0x1356 ; I2C_SetSlaveAddr + 52
        0x0000133c:    ea430442    C.B.    ORR      r4,r3,r2,LSL #1
        0x00001340:    61c4        .a      STR      r4,[r0,#0x1c]
        0x00001342:    e008        ..      B        0x1356 ; I2C_SetSlaveAddr + 52
        0x00001344:    ea430442    C.B.    ORR      r4,r3,r2,LSL #1
        0x00001348:    6204        .b      STR      r4,[r0,#0x20]
        0x0000134a:    e004        ..      B        0x1356 ; I2C_SetSlaveAddr + 52
        0x0000134c:    bf00        ..      NOP      
        0x0000134e:    ea430442    C.B.    ORR      r4,r3,r2,LSL #1
        0x00001352:    6044        D`      STR      r4,[r0,#4]
        0x00001354:    bf00        ..      NOP      
        0x00001356:    bf00        ..      NOP      
        0x00001358:    bd10        ..      POP      {r4,pc}
    I2C_SetSlaveAddrMask
        0x0000135a:    b181        ..      CBZ      r1,0x137e ; I2C_SetSlaveAddrMask + 36
        0x0000135c:    2901        .)      CMP      r1,#1
        0x0000135e:    d004        ..      BEQ      0x136a ; I2C_SetSlaveAddrMask + 16
        0x00001360:    2902        .)      CMP      r1,#2
        0x00001362:    d005        ..      BEQ      0x1370 ; I2C_SetSlaveAddrMask + 22
        0x00001364:    2903        .)      CMP      r1,#3
        0x00001366:    d109        ..      BNE      0x137c ; I2C_SetSlaveAddrMask + 34
        0x00001368:    e005        ..      B        0x1376 ; I2C_SetSlaveAddrMask + 28
        0x0000136a:    0053        S.      LSLS     r3,r2,#1
        0x0000136c:    6283        .b      STR      r3,[r0,#0x28]
        0x0000136e:    e009        ..      B        0x1384 ; I2C_SetSlaveAddrMask + 42
        0x00001370:    0053        S.      LSLS     r3,r2,#1
        0x00001372:    62c3        .b      STR      r3,[r0,#0x2c]
        0x00001374:    e006        ..      B        0x1384 ; I2C_SetSlaveAddrMask + 42
        0x00001376:    0053        S.      LSLS     r3,r2,#1
        0x00001378:    6303        .c      STR      r3,[r0,#0x30]
        0x0000137a:    e003        ..      B        0x1384 ; I2C_SetSlaveAddrMask + 42
        0x0000137c:    bf00        ..      NOP      
        0x0000137e:    0053        S.      LSLS     r3,r2,#1
        0x00001380:    6243        Cb      STR      r3,[r0,#0x24]
        0x00001382:    bf00        ..      NOP      
        0x00001384:    bf00        ..      NOP      
        0x00001386:    4770        pG      BX       lr
    I2C_EnableTimeout
        0x00001388:    b121        !.      CBZ      r1,0x1394 ; I2C_EnableTimeout + 12
        0x0000138a:    6942        Bi      LDR      r2,[r0,#0x14]
        0x0000138c:    f0420202    B...    ORR      r2,r2,#2
        0x00001390:    6142        Ba      STR      r2,[r0,#0x14]
        0x00001392:    e003        ..      B        0x139c ; I2C_EnableTimeout + 20
        0x00001394:    6942        Bi      LDR      r2,[r0,#0x14]
        0x00001396:    f0220202    "...    BIC      r2,r2,#2
        0x0000139a:    6142        Ba      STR      r2,[r0,#0x14]
        0x0000139c:    6942        Bi      LDR      r2,[r0,#0x14]
        0x0000139e:    f0420204    B...    ORR      r2,r2,#4
        0x000013a2:    6142        Ba      STR      r2,[r0,#0x14]
        0x000013a4:    4770        pG      BX       lr
    I2C_DisableTimeout
        0x000013a6:    6941        Ai      LDR      r1,[r0,#0x14]
        0x000013a8:    f0210104    !...    BIC      r1,r1,#4
        0x000013ac:    6141        Aa      STR      r1,[r0,#0x14]
        0x000013ae:    4770        pG      BX       lr
    I2C_EnableWakeup
        0x000013b0:    6bc1        .k      LDR      r1,[r0,#0x3c]
        0x000013b2:    f0410101    A...    ORR      r1,r1,#1
        0x000013b6:    63c1        .c      STR      r1,[r0,#0x3c]
        0x000013b8:    4770        pG      BX       lr
    I2C_DisableWakeup
        0x000013ba:    6bc1        .k      LDR      r1,[r0,#0x3c]
        0x000013bc:    f0210101    !...    BIC      r1,r1,#1
        0x000013c0:    63c1        .c      STR      r1,[r0,#0x3c]
        0x000013c2:    4770        pG      BX       lr
    I2C_SMBusGetStatus
        0x000013c4:    4601        .F      MOV      r1,r0
        0x000013c6:    6cc8        .l      LDR      r0,[r1,#0x4c]
        0x000013c8:    4770        pG      BX       lr
    I2C_SMBusClearInterruptFlag
        0x000013ca:    6cc2        .l      LDR      r2,[r0,#0x4c]
        0x000013cc:    430a        .C      ORRS     r2,r2,r1
        0x000013ce:    64c2        .d      STR      r2,[r0,#0x4c]
        0x000013d0:    4770        pG      BX       lr
    I2C_SMBusSetPacketByteCount
        0x000013d2:    6501        .e      STR      r1,[r0,#0x50]
        0x000013d4:    4770        pG      BX       lr
    I2C_SMBusOpen
        0x000013d6:    6c42        Bl      LDR      r2,[r0,#0x44]
        0x000013d8:    f022020c    "...    BIC      r2,r2,#0xc
        0x000013dc:    6442        Bd      STR      r2,[r0,#0x44]
        0x000013de:    2901        .)      CMP      r1,#1
        0x000013e0:    d104        ..      BNE      0x13ec ; I2C_SMBusOpen + 22
        0x000013e2:    6c42        Bl      LDR      r2,[r0,#0x44]
        0x000013e4:    f0420288    B...    ORR      r2,r2,#0x88
        0x000013e8:    6442        Bd      STR      r2,[r0,#0x44]
        0x000013ea:    e003        ..      B        0x13f4 ; I2C_SMBusOpen + 30
        0x000013ec:    6c42        Bl      LDR      r2,[r0,#0x44]
        0x000013ee:    f0420284    B...    ORR      r2,r2,#0x84
        0x000013f2:    6442        Bd      STR      r2,[r0,#0x44]
        0x000013f4:    4770        pG      BX       lr
    I2C_SMBusClose
        0x000013f6:    2100        .!      MOVS     r1,#0
        0x000013f8:    6441        Ad      STR      r1,[r0,#0x44]
        0x000013fa:    4770        pG      BX       lr
    I2C_SMBusPECTxEnable
        0x000013fc:    6c42        Bl      LDR      r2,[r0,#0x44]
        0x000013fe:    f4227280    "..r    BIC      r2,r2,#0x100
        0x00001402:    6442        Bd      STR      r2,[r0,#0x44]
        0x00001404:    b121        !.      CBZ      r1,0x1410 ; I2C_SMBusPECTxEnable + 20
        0x00001406:    6c42        Bl      LDR      r2,[r0,#0x44]
        0x00001408:    f4427281    B..r    ORR      r2,r2,#0x102
        0x0000140c:    6442        Bd      STR      r2,[r0,#0x44]
        0x0000140e:    e003        ..      B        0x1418 ; I2C_SMBusPECTxEnable + 28
        0x00001410:    6c42        Bl      LDR      r2,[r0,#0x44]
        0x00001412:    f0420202    B...    ORR      r2,r2,#2
        0x00001416:    6442        Bd      STR      r2,[r0,#0x44]
        0x00001418:    4770        pG      BX       lr
    I2C_SMBusGetPECValue
        0x0000141a:    4601        .F      MOV      r1,r0
        0x0000141c:    6d48        Hm      LDR      r0,[r1,#0x54]
        0x0000141e:    b2c0        ..      UXTB     r0,r0
        0x00001420:    4770        pG      BX       lr
    I2C_SMBusIdleTimeout
        0x00001422:    b570        p.      PUSH     {r4-r6,lr}
        0x00001424:    6c45        El      LDR      r5,[r0,#0x44]
        0x00001426:    f4457500    E..u    ORR      r5,r5,#0x200
        0x0000142a:    6445        Ed      STR      r5,[r0,#0x44]
        0x0000142c:    f44f757a    O.zu    MOV      r5,#0x3e8
        0x00001430:    fbb2f4f5    ....    UDIV     r4,r2,r5
        0x00001434:    fb01f504    ....    MUL      r5,r1,r4
        0x00001438:    f44f767a    O.zv    MOV      r6,#0x3e8
        0x0000143c:    fbb5f5f6    ....    UDIV     r5,r5,r6
        0x00001440:    2601        .&      MOVS     r6,#1
        0x00001442:    ebc60395    ....    RSB      r3,r6,r5,LSR #2
        0x00001446:    2bff        .+      CMP      r3,#0xff
        0x00001448:    d902        ..      BLS      0x1450 ; I2C_SMBusIdleTimeout + 46
        0x0000144a:    25ff        .%      MOVS     r5,#0xff
        0x0000144c:    6585        .e      STR      r5,[r0,#0x58]
        0x0000144e:    e000        ..      B        0x1452 ; I2C_SMBusIdleTimeout + 48
        0x00001450:    6583        .e      STR      r3,[r0,#0x58]
        0x00001452:    bd70        p.      POP      {r4-r6,pc}
    I2C_SMBusTimeout
        0x00001454:    b570        p.      PUSH     {r4-r6,lr}
        0x00001456:    6c45        El      LDR      r5,[r0,#0x44]
        0x00001458:    f4257500    %..u    BIC      r5,r5,#0x200
        0x0000145c:    6445        Ed      STR      r5,[r0,#0x44]
        0x0000145e:    6945        Ei      LDR      r5,[r0,#0x14]
        0x00001460:    f0250504    %...    BIC      r5,r5,#4
        0x00001464:    6145        Ea      STR      r5,[r0,#0x14]
        0x00001466:    f44f757a    O.zu    MOV      r5,#0x3e8
        0x0000146a:    fbb2f4f5    ....    UDIV     r4,r2,r5
        0x0000146e:    fb01f504    ....    MUL      r5,r1,r4
        0x00001472:    2601        .&      MOVS     r6,#1
        0x00001474:    ebc63395    ...3    RSB      r3,r6,r5,LSR #14
        0x00001478:    2bff        .+      CMP      r3,#0xff
        0x0000147a:    d801        ..      BHI      0x1480 ; I2C_SMBusTimeout + 44
        0x0000147c:    6583        .e      STR      r3,[r0,#0x58]
        0x0000147e:    bd70        p.      POP      {r4-r6,pc}
        0x00001480:    6945        Ei      LDR      r5,[r0,#0x14]
        0x00001482:    f0450504    E...    ORR      r5,r5,#4
        0x00001486:    6145        Ea      STR      r5,[r0,#0x14]
        0x00001488:    fb01f504    ....    MUL      r5,r1,r4
        0x0000148c:    2601        .&      MOVS     r6,#1
        0x0000148e:    ebc64515    ...E    RSB      r5,r6,r5,LSR #16
        0x00001492:    b2ed        ..      UXTB     r5,r5
        0x00001494:    6585        .e      STR      r5,[r0,#0x58]
        0x00001496:    bf00        ..      NOP      
        0x00001498:    e7f1        ..      B        0x147e ; I2C_SMBusTimeout + 42
    I2C_SMBusClockLoTimeout
        0x0000149a:    b570        p.      PUSH     {r4-r6,lr}
        0x0000149c:    6c45        El      LDR      r5,[r0,#0x44]
        0x0000149e:    f4257500    %..u    BIC      r5,r5,#0x200
        0x000014a2:    6445        Ed      STR      r5,[r0,#0x44]
        0x000014a4:    6945        Ei      LDR      r5,[r0,#0x14]
        0x000014a6:    f0250504    %...    BIC      r5,r5,#4
        0x000014aa:    6145        Ea      STR      r5,[r0,#0x14]
        0x000014ac:    f44f757a    O.zu    MOV      r5,#0x3e8
        0x000014b0:    fbb2f4f5    ....    UDIV     r4,r2,r5
        0x000014b4:    fb01f504    ....    MUL      r5,r1,r4
        0x000014b8:    2601        .&      MOVS     r6,#1
        0x000014ba:    ebc63395    ...3    RSB      r3,r6,r5,LSR #14
        0x000014be:    2bff        .+      CMP      r3,#0xff
        0x000014c0:    d801        ..      BHI      0x14c6 ; I2C_SMBusClockLoTimeout + 44
        0x000014c2:    65c3        .e      STR      r3,[r0,#0x5c]
        0x000014c4:    bd70        p.      POP      {r4-r6,pc}
        0x000014c6:    6945        Ei      LDR      r5,[r0,#0x14]
        0x000014c8:    f0450504    E...    ORR      r5,r5,#4
        0x000014cc:    6145        Ea      STR      r5,[r0,#0x14]
        0x000014ce:    fb01f504    ....    MUL      r5,r1,r4
        0x000014d2:    2601        .&      MOVS     r6,#1
        0x000014d4:    ebc64515    ...E    RSB      r5,r6,r5,LSR #16
        0x000014d8:    b2ed        ..      UXTB     r5,r5
        0x000014da:    65c5        .e      STR      r5,[r0,#0x5c]
        0x000014dc:    bf00        ..      NOP      
        0x000014de:    e7f1        ..      B        0x14c4 ; I2C_SMBusClockLoTimeout + 42
    $d
        0x000014e0:    40081000    ...@    DCD    1074270208
        0x000014e4:    40080000    ...@    DCD    1074266112
    $t
    .text
    SystemCoreClockUpdate
        0x000014e8:    b570        p.      PUSH     {r4-r6,lr}
        0x000014ea:    f000f857    ..W.    BL       CLK_GetPLLClockFreq ; 0x159c
        0x000014ee:    4941        AI      LDR      r1,[pc,#260] ; [0x15f4] = 0x20000014
        0x000014f0:    6008        .`      STR      r0,[r1,#0]
        0x000014f2:    4841        AH      LDR      r0,[pc,#260] ; [0x15f8] = 0x40000210
        0x000014f4:    6800        .h      LDR      r0,[r0,#0]
        0x000014f6:    f0000507    ....    AND      r5,r0,#7
        0x000014fa:    2d02        .-      CMP      r5,#2
        0x000014fc:    d102        ..      BNE      0x1504 ; SystemCoreClockUpdate + 28
        0x000014fe:    4608        .F      MOV      r0,r1
        0x00001500:    6804        .h      LDR      r4,[r0,#0]
        0x00001502:    e002        ..      B        0x150a ; SystemCoreClockUpdate + 34
        0x00001504:    483d        =H      LDR      r0,[pc,#244] ; [0x15fc] = 0x20000018
        0x00001506:    f8504025    P.%@    LDR      r4,[r0,r5,LSL #2]
        0x0000150a:    483b        ;H      LDR      r0,[pc,#236] ; [0x15f8] = 0x40000210
        0x0000150c:    3010        .0      ADDS     r0,r0,#0x10
        0x0000150e:    6800        .h      LDR      r0,[r0,#0]
        0x00001510:    f000000f    ....    AND      r0,r0,#0xf
        0x00001514:    1c46        F.      ADDS     r6,r0,#1
        0x00001516:    fbb4f0f6    ....    UDIV     r0,r4,r6
        0x0000151a:    4939        9I      LDR      r1,[pc,#228] ; [0x1600] = 0x2000000c
        0x0000151c:    6008        .`      STR      r0,[r1,#0]
        0x0000151e:    4608        .F      MOV      r0,r1
        0x00001520:    6800        .h      LDR      r0,[r0,#0]
        0x00001522:    4938        8I      LDR      r1,[pc,#224] ; [0x1604] = 0x7a120
        0x00001524:    4408        .D      ADD      r0,r0,r1
        0x00001526:    0049        I.      LSLS     r1,r1,#1
        0x00001528:    fbb0f0f1    ....    UDIV     r0,r0,r1
        0x0000152c:    4936        6I      LDR      r1,[pc,#216] ; [0x1608] = 0x20000010
        0x0000152e:    6008        .`      STR      r0,[r1,#0]
        0x00001530:    bd70        p.      POP      {r4-r6,pc}
    SystemInit
        0x00001532:    bf00        ..      NOP      
        0x00001534:    bf00        ..      NOP      
        0x00001536:    bf00        ..      NOP      
        0x00001538:    2059        Y       MOVS     r0,#0x59
        0x0000153a:    4934        4I      LDR      r1,[pc,#208] ; [0x160c] = 0x40000100
        0x0000153c:    6008        .`      STR      r0,[r1,#0]
        0x0000153e:    2016        .       MOVS     r0,#0x16
        0x00001540:    0589        ..      LSLS     r1,r1,#22
        0x00001542:    f8c10100    ....    STR      r0,[r1,#0x100]
        0x00001546:    2088        .       MOVS     r0,#0x88
        0x00001548:    f8c10100    ....    STR      r0,[r1,#0x100]
        0x0000154c:    06c0        ..      LSLS     r0,r0,#27
        0x0000154e:    f8d00100    ....    LDR      r0,[r0,#0x100]
        0x00001552:    2800        .(      CMP      r0,#0
        0x00001554:    d0f0        ..      BEQ      0x1538 ; SystemInit + 6
        0x00001556:    bf00        ..      NOP      
        0x00001558:    4608        .F      MOV      r0,r1
        0x0000155a:    6800        .h      LDR      r0,[r0,#0]
        0x0000155c:    f6401145    @.E.    MOV      r1,#0x945
        0x00001560:    ebb13f10    ...?    CMP      r1,r0,LSR #12
        0x00001564:    d105        ..      BNE      0x1572 ; SystemInit + 64
        0x00001566:    0788        ..      LSLS     r0,r1,#30
        0x00001568:    6940        @i      LDR      r0,[r0,#0x14]
        0x0000156a:    f0400080    @...    ORR      r0,r0,#0x80
        0x0000156e:    0789        ..      LSLS     r1,r1,#30
        0x00001570:    6148        Ha      STR      r0,[r1,#0x14]
        0x00001572:    4821        !H      LDR      r0,[pc,#132] ; [0x15f8] = 0x40000210
        0x00001574:    3810        .8      SUBS     r0,r0,#0x10
        0x00001576:    6800        .h      LDR      r0,[r0,#0]
        0x00001578:    f4205080     ..P    BIC      r0,r0,#0x1000
        0x0000157c:    f04f4180    O..A    MOV      r1,#0x40000000
        0x00001580:    f8c10200    ....    STR      r0,[r1,#0x200]
        0x00001584:    bf00        ..      NOP      
        0x00001586:    2000        .       MOVS     r0,#0
        0x00001588:    4920         I      LDR      r1,[pc,#128] ; [0x160c] = 0x40000100
        0x0000158a:    6008        .`      STR      r0,[r1,#0]
        0x0000158c:    bf00        ..      NOP      
        0x0000158e:    4820         H      LDR      r0,[pc,#128] ; [0x1610] = 0xe000ed88
        0x00001590:    6800        .h      LDR      r0,[r0,#0]
        0x00001592:    f4400070    @.p.    ORR      r0,r0,#0xf00000
        0x00001596:    491e        .I      LDR      r1,[pc,#120] ; [0x1610] = 0xe000ed88
        0x00001598:    6008        .`      STR      r0,[r1,#0]
        0x0000159a:    4770        pG      BX       lr
    CLK_GetPLLClockFreq
        0x0000159c:    b5f8        ..      PUSH     {r3-r7,lr}
        0x0000159e:    2600        .&      MOVS     r6,#0
        0x000015a0:    a01c        ..      ADR      r0,{pc}+0x74 ; 0x1614
        0x000015a2:    6800        .h      LDR      r0,[r0,#0]
        0x000015a4:    9000        ..      STR      r0,[sp,#0]
        0x000015a6:    4814        .H      LDR      r0,[pc,#80] ; [0x15f8] = 0x40000210
        0x000015a8:    3030        00      ADDS     r0,r0,#0x30
        0x000015aa:    6801        .h      LDR      r1,[r0,#0]
        0x000015ac:    f40120a0    ...     AND      r0,r1,#0x50000
        0x000015b0:    b108        ..      CBZ      r0,0x15b6 ; CLK_GetPLLClockFreq + 26
        0x000015b2:    2000        .       MOVS     r0,#0
        0x000015b4:    bdf8        ..      POP      {r3-r7,pc}
        0x000015b6:    f4012000    ...     AND      r0,r1,#0x80000
        0x000015ba:    b108        ..      CBZ      r0,0x15c0 ; CLK_GetPLLClockFreq + 36
        0x000015bc:    4a16        .J      LDR      r2,[pc,#88] ; [0x1618] = 0x1518000
        0x000015be:    e000        ..      B        0x15c2 ; CLK_GetPLLClockFreq + 38
        0x000015c0:    4a16        .J      LDR      r2,[pc,#88] ; [0x161c] = 0xb71b00
        0x000015c2:    f4013000    ...0    AND      r0,r1,#0x20000
        0x000015c6:    b108        ..      CBZ      r0,0x15cc ; CLK_GetPLLClockFreq + 48
        0x000015c8:    4610        .F      MOV      r0,r2
        0x000015ca:    e7f3        ..      B        0x15b4 ; CLK_GetPLLClockFreq + 24
        0x000015cc:    f3c13781    ...7    UBFX     r7,r1,#14,#2
        0x000015d0:    f81d4007    ...@    LDRB     r4,[sp,r7]
        0x000015d4:    f3c10008    ....    UBFX     r0,r1,#0,#9
        0x000015d8:    1c83        ..      ADDS     r3,r0,#2
        0x000015da:    f3c12044    ..D     UBFX     r0,r1,#9,#5
        0x000015de:    1c85        ..      ADDS     r5,r0,#2
        0x000015e0:    0890        ..      LSRS     r0,r2,#2
        0x000015e2:    4358        XC      MULS     r0,r3,r0
        0x000015e4:    fb15f704    ....    SMULBB   r7,r5,r4
        0x000015e8:    fbb0f0f7    ....    UDIV     r0,r0,r7
        0x000015ec:    0086        ..      LSLS     r6,r0,#2
        0x000015ee:    4630        0F      MOV      r0,r6
        0x000015f0:    e7e0        ..      B        0x15b4 ; CLK_GetPLLClockFreq + 24
    $d
        0x000015f2:    0000        ..      DCW    0
        0x000015f4:    20000014    ...     DCD    536870932
        0x000015f8:    40000210    ...@    DCD    1073742352
        0x000015fc:    20000018    ...     DCD    536870936
        0x00001600:    2000000c    ...     DCD    536870924
        0x00001604:    0007a120     ...    DCD    500000
        0x00001608:    20000010    ...     DCD    536870928
        0x0000160c:    40000100    ...@    DCD    1073742080
        0x00001610:    e000ed88    ....    DCD    3758157192
        0x00001614:    04020201    ....    DCD    67240449
        0x00001618:    01518000    ..Q.    DCD    22118400
        0x0000161c:    00b71b00    ....    DCD    12000000
    $t
    .text
    $v0
    Reset_Handler
        0x00001620:    4814        .H      LDR      r0,[pc,#80] ; [0x1674] = 0x40000100
        0x00001622:    f04f0159    O.Y.    MOV      r1,#0x59
        0x00001626:    6001        .`      STR      r1,[r0,#0]
        0x00001628:    f04f0116    O...    MOV      r1,#0x16
        0x0000162c:    6001        .`      STR      r1,[r0,#0]
        0x0000162e:    f04f0188    O...    MOV      r1,#0x88
        0x00001632:    6001        .`      STR      r1,[r0,#0]
        0x00001634:    4a10        .J      LDR      r2,[pc,#64] ; [0x1678] = 0x40000024
        0x00001636:    f64521a5    E..!    MOV      r1,#0x5aa5
        0x0000163a:    6011        .`      STR      r1,[r2,#0]
        0x0000163c:    4a0f        .J      LDR      r2,[pc,#60] ; [0x167c] = 0x40000200
        0x0000163e:    6811        .h      LDR      r1,[r2,#0]
        0x00001640:    f4215180    !..Q    BIC      r1,r1,#0x1000
        0x00001644:    6011        .`      STR      r1,[r2,#0]
        0x00001646:    2100        .!      MOVS     r1,#0
        0x00001648:    6001        .`      STR      r1,[r0,#0]
        0x0000164a:    480d        .H      LDR      r0,[pc,#52] ; [0x1680] = 0x1533
        0x0000164c:    4780        .G      BLX      r0
        0x0000164e:    480d        .H      LDR      r0,[pc,#52] ; [0x1684] = 0x141
        0x00001650:    4700        .G      BX       r0
    NMI_Handler
        0x00001652:    e7fe        ..      B        NMI_Handler ; 0x1652
    HardFault_Handler
        0x00001654:    e7fe        ..      B        HardFault_Handler ; 0x1654
    MemManage_Handler
        0x00001656:    e7fe        ..      B        MemManage_Handler ; 0x1656
    BusFault_Handler
        0x00001658:    e7fe        ..      B        BusFault_Handler ; 0x1658
    UsageFault_Handler
        0x0000165a:    e7fe        ..      B        UsageFault_Handler ; 0x165a
    SVC_Handler
        0x0000165c:    e7fe        ..      B        SVC_Handler ; 0x165c
    DebugMon_Handler
        0x0000165e:    e7fe        ..      B        DebugMon_Handler ; 0x165e
    PendSV_Handler
        0x00001660:    e7fe        ..      B        PendSV_Handler ; 0x1660
    SysTick_Handler
        0x00001662:    e7fe        ..      B        SysTick_Handler ; 0x1662
    Default_Handler
    ACMP01_IRQHandler
    ADC00_IRQHandler
    ADC01_IRQHandler
    ADC02_IRQHandler
    ADC03_IRQHandler
    BOD_IRQHandler
    BRAKE0_IRQHandler
    BRAKE1_IRQHandler
    CAN0_IRQHandler
    CLKFAIL_IRQHandler
    DAC_IRQHandler
    EINT0_IRQHandler
    EINT1_IRQHandler
    EINT2_IRQHandler
    EINT3_IRQHandler
    EINT4_IRQHandler
    EINT5_IRQHandler
    GPA_IRQHandler
    GPB_IRQHandler
    GPC_IRQHandler
    GPD_IRQHandler
    GPE_IRQHandler
    GPF_IRQHandler
    I2C1_IRQHandler
    IRC_IRQHandler
    PDMA_IRQHandler
    PWM0P0_IRQHandler
    PWM0P1_IRQHandler
    PWM0P2_IRQHandler
    PWM1P0_IRQHandler
    PWM1P1_IRQHandler
    PWM1P2_IRQHandler
    PWRWU_IRQHandler
    RAMPE_IRQHandler
    RTC_IRQHandler
    SC0_IRQHandler
    SPI0_IRQHandler
    SPI1_IRQHandler
    SPI2_IRQHandler
    TAMPER_IRQHandler
    TK_IRQHandler
    TMR0_IRQHandler
    TMR1_IRQHandler
    TMR2_IRQHandler
    TMR3_IRQHandler
    UART0_IRQHandler
    UART1_IRQHandler
    UART2_IRQHandler
    UART3_IRQHandler
    USBD_IRQHandler
    USBH_IRQHandler
    USBOTG_IRQHandler
    WDT_IRQHandler
    WWDT_IRQHandler
        0x00001664:    e7fe        ..      B        Default_Handler ; 0x1664
    $d
        0x00001666:    0000        ..      DCW    0
    $t
    __user_initial_stackheap
        0x00001668:    4807        .H      LDR      r0,[pc,#28] ; [0x1688] = 0x20000160
        0x0000166a:    4908        .I      LDR      r1,[pc,#32] ; [0x168c] = 0x20000b60
        0x0000166c:    4a08        .J      LDR      r2,[pc,#32] ; [0x1690] = 0x20000360
        0x0000166e:    4b09        .K      LDR      r3,[pc,#36] ; [0x1694] = 0x20000360
        0x00001670:    4770        pG      BX       lr
    $d
        0x00001672:    0000        ..      DCW    0
        0x00001674:    40000100    ...@    DCD    1073742080
        0x00001678:    40000024    $..@    DCD    1073741860
        0x0000167c:    40000200    ...@    DCD    1073742336
        0x00001680:    00001533    3...    DCD    5427
        0x00001684:    00000141    A...    DCD    321
        0x00001688:    20000160    `..     DCD    536871264
        0x0000168c:    20000b60    `..     DCD    536873824
        0x00001690:    20000360    `..     DCD    536871776
        0x00001694:    20000360    `..     DCD    536871776
    $t
    .text
    __use_two_region_memory
        0x00001698:    4770        pG      BX       lr
    __rt_heap_escrow$2region
        0x0000169a:    4770        pG      BX       lr
    __rt_heap_expand$2region
        0x0000169c:    4770        pG      BX       lr
    .text
    __user_setup_stackheap
        0x0000169e:    4675        uF      MOV      r5,lr
        0x000016a0:    f000f828    ..(.    BL       __user_libspace ; 0x16f4
        0x000016a4:    46ae        .F      MOV      lr,r5
        0x000016a6:    0005        ..      MOVS     r5,r0
        0x000016a8:    4669        iF      MOV      r1,sp
        0x000016aa:    4653        SF      MOV      r3,r10
        0x000016ac:    f0200007     ...    BIC      r0,r0,#7
        0x000016b0:    4685        .F      MOV      sp,r0
        0x000016b2:    b018        ..      ADD      sp,sp,#0x60
        0x000016b4:    b520         .      PUSH     {r5,lr}
        0x000016b6:    f7ffffd7    ....    BL       __user_initial_stackheap ; 0x1668
        0x000016ba:    e8bd4020    .. @    POP      {r5,lr}
        0x000016be:    f04f0600    O...    MOV      r6,#0
        0x000016c2:    f04f0700    O...    MOV      r7,#0
        0x000016c6:    f04f0800    O...    MOV      r8,#0
        0x000016ca:    f04f0b00    O...    MOV      r11,#0
        0x000016ce:    f0210107    !...    BIC      r1,r1,#7
        0x000016d2:    46ac        .F      MOV      r12,r5
        0x000016d4:    e8ac09c0    ....    STM      r12!,{r6-r8,r11}
        0x000016d8:    e8ac09c0    ....    STM      r12!,{r6-r8,r11}
        0x000016dc:    e8ac09c0    ....    STM      r12!,{r6-r8,r11}
        0x000016e0:    e8ac09c0    ....    STM      r12!,{r6-r8,r11}
        0x000016e4:    468d        .F      MOV      sp,r1
        0x000016e6:    4770        pG      BX       lr
    .text
    exit
        0x000016e8:    4604        .F      MOV      r4,r0
        0x000016ea:    f3af8000    ....    NOP.W    
        0x000016ee:    4620         F      MOV      r0,r4
        0x000016f0:    f7fefd6f    ..o.    BL       __rt_exit ; 0x1d2
    .text
    __user_libspace
    __user_perproc_libspace
    __user_perthread_libspace
        0x000016f4:    4800        .H      LDR      r0,[pc,#0] ; [0x16f8] = 0x20000100
        0x000016f6:    4770        pG      BX       lr
    $d
        0x000016f8:    20000100    ...     DCD    536871168
    $t
    .text
    _sys_exit
        0x000016fc:    4901        .I      LDR      r1,[pc,#4] ; [0x1704] = 0x20026
        0x000016fe:    2018        .       MOVS     r0,#0x18
        0x00001700:    beab        ..      BKPT     #0xab
        0x00001702:    e7fe        ..      B        0x1702 ; _sys_exit + 6
    $d
        0x00001704:    00020026    &...    DCD    131110
    $t
    .text
    __I$use$semihosting
    __use_no_semihosting_swi
        0x00001708:    4770        pG      BX       lr
    x$fpl$fpinit
    $v0
    .text
    __semihosting_library_function
    _fp_init
        0x0000170a:    f04f7040    O.@p    MOV      r0,#0x3000000
        0x0000170e:    eee10a10    ....    VMSR     FPSCR,r0
    __fplib_config_fpu_vfp
    __fplib_config_pureend_doubles
        0x00001712:    4770        pG      BX       lr
    $d.realdata
    Region$$Table$$Base
        0x00001714:    00001734    4...    DCD    5940
        0x00001718:    20000000    ...     DCD    536870912
        0x0000171c:    00000038    8...    DCD    56
        0x00001720:    0000017c    |...    DCD    380
        0x00001724:    0000176c    l...    DCD    5996
        0x00001728:    20000038    8..     DCD    536870968
        0x0000172c:    00000b28    (...    DCD    2856
        0x00001730:    00000198    ....    DCD    408
    Region$$Table$$Limit

** Section #2 'ER_RW' (SHT_PROGBITS) [SHF_ALLOC + SHF_WRITE]
    Size   : 56 bytes (alignment 4)
    Address: 0x20000000


** Section #3 'ER_ZI' (SHT_NOBITS) [SHF_ALLOC + SHF_WRITE]
    Size   : 2856 bytes (alignment 8)
    Address: 0x20000038


** Section #4 '.debug_abbrev' (SHT_PROGBITS)
    Size   : 1476 bytes


** Section #5 '.debug_frame' (SHT_PROGBITS)
    Size   : 3512 bytes


** Section #6 '.debug_info' (SHT_PROGBITS)
    Size   : 27696 bytes


** Section #7 '.debug_line' (SHT_PROGBITS)
    Size   : 6784 bytes


** Section #8 '.debug_loc' (SHT_PROGBITS)
    Size   : 5692 bytes


** Section #9 '.debug_macinfo' (SHT_PROGBITS)
    Size   : 262040 bytes


** Section #10 '.debug_pubnames' (SHT_PROGBITS)
    Size   : 2433 bytes


** Section #11 '.symtab' (SHT_SYMTAB)
    Size   : 6896 bytes (alignment 4)
    String table #12 '.strtab'
    Last local symbol no. 181


** Section #12 '.strtab' (SHT_STRTAB)
    Size   : 7012 bytes


** Section #13 '.note' (SHT_NOTE)
    Size   : 28 bytes (alignment 4)


** Section #14 '.comment' (SHT_PROGBITS)
    Size   : 11368 bytes


** Section #15 '.shstrtab' (SHT_STRTAB)
    Size   : 156 bytes


